1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef IMX8_LPUART_H 8*91f16700Schasinglulu #define IMX8_LPUART_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <drivers/console.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define VERID 0x0 13*91f16700Schasinglulu #define PARAM 0x4 14*91f16700Schasinglulu #define GLOBAL 0x8 15*91f16700Schasinglulu #define PINCFG 0xC 16*91f16700Schasinglulu #define BAUD 0x10 17*91f16700Schasinglulu #define STAT 0x14 18*91f16700Schasinglulu #define CTRL 0x18 19*91f16700Schasinglulu #define DATA 0x1C 20*91f16700Schasinglulu #define MATCH 0x20 21*91f16700Schasinglulu #define MODIR 0x24 22*91f16700Schasinglulu #define FIFO 0x28 23*91f16700Schasinglulu #define WATER 0x2c 24*91f16700Schasinglulu 25*91f16700Schasinglulu #define US1_TDRE (1 << 23) 26*91f16700Schasinglulu #define US1_RDRF (1 << 21) 27*91f16700Schasinglulu 28*91f16700Schasinglulu #define CTRL_TE (1 << 19) 29*91f16700Schasinglulu #define CTRL_RE (1 << 18) 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define FIFO_TXFE 0x80 32*91f16700Schasinglulu #define FIFO_RXFE 0x40 33*91f16700Schasinglulu 34*91f16700Schasinglulu #define WATER_TXWATER_OFF 1 35*91f16700Schasinglulu #define WATER_RXWATER_OFF 16 36*91f16700Schasinglulu 37*91f16700Schasinglulu #define LPUART_CTRL_PT_MASK 0x1 38*91f16700Schasinglulu #define LPUART_CTRL_PE_MASK 0x2 39*91f16700Schasinglulu #define LPUART_CTRL_M_MASK 0x10 40*91f16700Schasinglulu 41*91f16700Schasinglulu #define LPUART_BAUD_OSR_MASK (0x1F000000U) 42*91f16700Schasinglulu #define LPUART_BAUD_OSR_SHIFT (24U) 43*91f16700Schasinglulu #define LPUART_BAUD_OSR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK) 44*91f16700Schasinglulu 45*91f16700Schasinglulu #define LPUART_BAUD_SBR_MASK (0x1FFFU) 46*91f16700Schasinglulu #define LPUART_BAUD_SBR_SHIFT (0U) 47*91f16700Schasinglulu #define LPUART_BAUD_SBR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK) 48*91f16700Schasinglulu 49*91f16700Schasinglulu #define LPUART_BAUD_SBNS_MASK (0x2000U) 50*91f16700Schasinglulu #define LPUART_BAUD_BOTHEDGE_MASK (0x20000U) 51*91f16700Schasinglulu #define LPUART_BAUD_M10_MASK (0x20000000U) 52*91f16700Schasinglulu 53*91f16700Schasinglulu #ifndef __ASSEMBLER__ 54*91f16700Schasinglulu 55*91f16700Schasinglulu #include <stdint.h> 56*91f16700Schasinglulu 57*91f16700Schasinglulu int console_lpuart_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud, 58*91f16700Schasinglulu console_t *console); 59*91f16700Schasinglulu #endif /*__ASSEMBLER__*/ 60*91f16700Schasinglulu 61*91f16700Schasinglulu #endif /* IMX8_LPUART_H */ 62