xref: /arm-trusted-firmware/plat/imx/common/imx_uart_console.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700Schasinglulu#include <arch.h>
8*91f16700Schasinglulu#include <asm_macros.S>
9*91f16700Schasinglulu#include <console_macros.S>
10*91f16700Schasinglulu#include <assert_macros.S>
11*91f16700Schasinglulu#include "imx_uart.h"
12*91f16700Schasinglulu
13*91f16700Schasinglulu#define URXD  0x0  /* Receiver Register */
14*91f16700Schasinglulu#define UTXD  0x40 /* Transmitter Register */
15*91f16700Schasinglulu#define USR2  0x98 /* UART Status Register 2 */
16*91f16700Schasinglulu#define UTS   0xb4 /* UART Test Register (mx31) */
17*91f16700Schasinglulu#define  URXD_RX_DATA    (0xFF)
18*91f16700Schasinglulu
19*91f16700Schasinglulu	.globl	console_imx_uart_register
20*91f16700Schasinglulu	.globl	console_imx_uart_init
21*91f16700Schasinglulu	.globl	console_imx_uart_putc
22*91f16700Schasinglulu	.globl	console_imx_uart_getc
23*91f16700Schasinglulu	.globl	console_imx_uart_flush
24*91f16700Schasinglulu
25*91f16700Schasinglulufunc console_imx_uart_register
26*91f16700Schasinglulu	mov	x7, x30
27*91f16700Schasinglulu	mov	x6, x3
28*91f16700Schasinglulu	cbz	x6, register_fail
29*91f16700Schasinglulu	str	x0, [x6, #CONSOLE_T_BASE]
30*91f16700Schasinglulu
31*91f16700Schasinglulu	bl	console_imx_uart_init
32*91f16700Schasinglulu	cbz	x0, register_fail
33*91f16700Schasinglulu
34*91f16700Schasinglulu	mov	x0, x6
35*91f16700Schasinglulu	mov	x30, x7
36*91f16700Schasinglulu	finish_console_register imx_uart putc=1, getc=ENABLE_CONSOLE_GETC, flush=1
37*91f16700Schasinglulu
38*91f16700Schasingluluregister_fail:
39*91f16700Schasinglulu	ret	x7
40*91f16700Schasingluluendfunc console_imx_uart_register
41*91f16700Schasinglulu
42*91f16700Schasinglulufunc console_imx_uart_init
43*91f16700Schasinglulu	mov	w0, #1
44*91f16700Schasinglulu	ret
45*91f16700Schasingluluendfunc console_imx_uart_init
46*91f16700Schasinglulu
47*91f16700Schasinglulufunc console_imx_uart_putc
48*91f16700Schasinglulu	ldr	x1, [x1, #CONSOLE_T_BASE]
49*91f16700Schasinglulu	cbz	x1, putc_error
50*91f16700Schasinglulu
51*91f16700Schasinglulu	/* Prepare '\r' to '\n' */
52*91f16700Schasinglulu	cmp	w0, #0xA
53*91f16700Schasinglulu	b.ne	2f
54*91f16700Schasinglulu1:
55*91f16700Schasinglulu	/* Check if the transmit FIFO is full */
56*91f16700Schasinglulu	ldr	w2, [x1, #UTS]
57*91f16700Schasinglulu	tbnz	w2, #4, 1b
58*91f16700Schasinglulu	mov	w2, #0xD
59*91f16700Schasinglulu	str	w2, [x1, #UTXD]
60*91f16700Schasinglulu2:
61*91f16700Schasinglulu	/* Check if the transmit FIFO is full */
62*91f16700Schasinglulu	ldr	w2, [x1, #UTS]
63*91f16700Schasinglulu	tbnz	w2, #4, 2b
64*91f16700Schasinglulu	str	w0, [x1, #UTXD]
65*91f16700Schasinglulu	ret
66*91f16700Schasingluluputc_error:
67*91f16700Schasinglulu	mov	w0, #-1
68*91f16700Schasinglulu	ret
69*91f16700Schasingluluendfunc console_imx_uart_putc
70*91f16700Schasinglulu
71*91f16700Schasinglulufunc console_imx_uart_getc
72*91f16700Schasinglulu	ldr	x0, [x0, #CONSOLE_T_BASE]
73*91f16700Schasinglulu	cbz	x0, getc_error
74*91f16700Schasinglulu1:
75*91f16700Schasinglulu	ldr	w1, [x0, #UTS]
76*91f16700Schasinglulu	tbnz	w1, #5, 1b
77*91f16700Schasinglulu
78*91f16700Schasinglulu	ldr	w1, [x0, #URXD]
79*91f16700Schasinglulu	and	w0, w1, #URXD_RX_DATA
80*91f16700Schasinglulu
81*91f16700Schasinglulu	ret
82*91f16700Schasinglulugetc_error:
83*91f16700Schasinglulu	mov	w0, #-1
84*91f16700Schasinglulu	ret
85*91f16700Schasingluluendfunc console_imx_uart_getc
86*91f16700Schasinglulu
87*91f16700Schasinglulufunc console_imx_uart_flush
88*91f16700Schasinglulu	ldr	x0, [x0, #CONSOLE_T_BASE]
89*91f16700Schasinglulu	cbz	x0, flush_exit
90*91f16700Schasinglulu1:
91*91f16700Schasinglulu	/* Wait for the transmit complete bit */
92*91f16700Schasinglulu	ldr	w1, [x0, #USR2]
93*91f16700Schasinglulu	tbz	w1, #3, 1b
94*91f16700Schasinglulu
95*91f16700Schasingluluflush_exit:
96*91f16700Schasinglulu	ret
97*91f16700Schasingluluendfunc console_imx_uart_flush
98