1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu#include <console_macros.S> 10*91f16700Schasinglulu#include <assert_macros.S> 11*91f16700Schasinglulu#include "imx_uart.h" 12*91f16700Schasinglulu 13*91f16700Schasinglulu .globl console_imx_uart_register 14*91f16700Schasinglulu .globl console_imx_uart_putc 15*91f16700Schasinglulu .globl console_imx_uart_getc 16*91f16700Schasinglulu .globl console_imx_uart_flush 17*91f16700Schasinglulu 18*91f16700Schasinglulufunc console_imx_uart_register 19*91f16700Schasinglulu push {r4, lr} 20*91f16700Schasinglulu mov r4, r3 21*91f16700Schasinglulu cmp r4, #0 22*91f16700Schasinglulu beq register_fail 23*91f16700Schasinglulu str r0, [r4, #CONSOLE_T_BASE] 24*91f16700Schasinglulu 25*91f16700Schasinglulu bl console_imx_uart_core_init 26*91f16700Schasinglulu cmp r0, #0 27*91f16700Schasinglulu bne register_fail 28*91f16700Schasinglulu 29*91f16700Schasinglulu mov r0, r4 30*91f16700Schasinglulu pop {r4, lr} 31*91f16700Schasinglulu finish_console_register imx_uart putc=1, getc=ENABLE_CONSOLE_GETC, flush=1 32*91f16700Schasinglulu 33*91f16700Schasingluluregister_fail: 34*91f16700Schasinglulu pop {r4, pc} 35*91f16700Schasingluluendfunc console_imx_uart_register 36*91f16700Schasinglulu 37*91f16700Schasinglulufunc console_imx_uart_putc 38*91f16700Schasinglulu ldr r1, [r1, #CONSOLE_T_BASE] 39*91f16700Schasinglulu b console_imx_uart_core_putc 40*91f16700Schasingluluendfunc console_imx_uart_putc 41*91f16700Schasinglulu 42*91f16700Schasinglulufunc console_imx_uart_getc 43*91f16700Schasinglulu ldr r0, [r0, #CONSOLE_T_BASE] 44*91f16700Schasinglulu b console_imx_uart_core_getc 45*91f16700Schasingluluendfunc console_imx_uart_getc 46*91f16700Schasinglulu 47*91f16700Schasinglulufunc console_imx_uart_flush 48*91f16700Schasinglulu ldr r0, [r0, #CONSOLE_T_BASE] 49*91f16700Schasinglulu b console_imx_uart_core_flush 50*91f16700Schasingluluendfunc console_imx_uart_flush 51