1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <drivers/arm/gicv2.h> 10*91f16700Schasinglulu #include <plat/common/platform.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /****************************************************************************** 13*91f16700Schasinglulu * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 14*91f16700Schasinglulu * interrupts. 15*91f16700Schasinglulu *****************************************************************************/ 16*91f16700Schasinglulu static const interrupt_prop_t poplar_interrupt_props[] = { 17*91f16700Schasinglulu POPLAR_G1S_IRQ_PROPS(GICV2_INTR_GROUP0), 18*91f16700Schasinglulu POPLAR_G0_IRQ_PROPS(GICV2_INTR_GROUP0) 19*91f16700Schasinglulu }; 20*91f16700Schasinglulu 21*91f16700Schasinglulu static unsigned int target_mask_array[PLATFORM_CORE_COUNT]; 22*91f16700Schasinglulu 23*91f16700Schasinglulu static const gicv2_driver_data_t poplar_gic_data = { 24*91f16700Schasinglulu .gicd_base = POPLAR_GICD_BASE, 25*91f16700Schasinglulu .gicc_base = POPLAR_GICC_BASE, 26*91f16700Schasinglulu .interrupt_props = poplar_interrupt_props, 27*91f16700Schasinglulu .interrupt_props_num = ARRAY_SIZE(poplar_interrupt_props), 28*91f16700Schasinglulu .target_masks = target_mask_array, 29*91f16700Schasinglulu .target_masks_num = ARRAY_SIZE(target_mask_array), 30*91f16700Schasinglulu }; 31*91f16700Schasinglulu 32*91f16700Schasinglulu /****************************************************************************** 33*91f16700Schasinglulu * Helper to initialize the GICv2 only driver. 34*91f16700Schasinglulu *****************************************************************************/ 35*91f16700Schasinglulu void poplar_gic_driver_init(void) 36*91f16700Schasinglulu { 37*91f16700Schasinglulu gicv2_driver_init(&poplar_gic_data); 38*91f16700Schasinglulu } 39*91f16700Schasinglulu 40*91f16700Schasinglulu void poplar_gic_init(void) 41*91f16700Schasinglulu { 42*91f16700Schasinglulu gicv2_distif_init(); 43*91f16700Schasinglulu gicv2_pcpu_distif_init(); 44*91f16700Schasinglulu gicv2_set_pe_target_mask(plat_my_core_pos()); 45*91f16700Schasinglulu gicv2_cpuif_enable(); 46*91f16700Schasinglulu } 47*91f16700Schasinglulu 48*91f16700Schasinglulu /****************************************************************************** 49*91f16700Schasinglulu * Helper to enable the GICv2 CPU interface 50*91f16700Schasinglulu *****************************************************************************/ 51*91f16700Schasinglulu void poplar_gic_cpuif_enable(void) 52*91f16700Schasinglulu { 53*91f16700Schasinglulu gicv2_cpuif_enable(); 54*91f16700Schasinglulu } 55*91f16700Schasinglulu 56*91f16700Schasinglulu /****************************************************************************** 57*91f16700Schasinglulu * Helper to initialize the per cpu distributor interface in GICv2 58*91f16700Schasinglulu *****************************************************************************/ 59*91f16700Schasinglulu void poplar_gic_pcpu_init(void) 60*91f16700Schasinglulu { 61*91f16700Schasinglulu gicv2_pcpu_distif_init(); 62*91f16700Schasinglulu gicv2_set_pe_target_mask(plat_my_core_pos()); 63*91f16700Schasinglulu } 64