xref: /arm-trusted-firmware/plat/hisilicon/poplar/include/poplar_layout.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef POPLAR_LAYOUT_H
8*91f16700Schasinglulu #define POPLAR_LAYOUT_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu /*
11*91f16700Schasinglulu  * Boot memory layout definitions for the HiSilicon Poplar board
12*91f16700Schasinglulu  */
13*91f16700Schasinglulu 
14*91f16700Schasinglulu /*
15*91f16700Schasinglulu  * When Poplar is powered on, boot ROM verifies the initial content of
16*91f16700Schasinglulu  * boot media, loads it into low memory, and begins executing it
17*91f16700Schasinglulu  * in 32-bit mode.  The image loaded is "l-loader.bin", which contains
18*91f16700Schasinglulu  * a small amount code along with an embedded ARM Trusted Firmware
19*91f16700Schasinglulu  * BL1 image.  The main purpose of "l-loader" is to prepare the
20*91f16700Schasinglulu  * processor to execute the BL1 image in 64-bit mode, and to trigger
21*91f16700Schasinglulu  * that execution.
22*91f16700Schasinglulu  *
23*91f16700Schasinglulu  * Also embedded in "l-loader.bin" is a FIP image that contains
24*91f16700Schasinglulu  * other ARM Trusted Firmware images:  BL2; BL31; and for BL33,
25*91f16700Schasinglulu  * U-Boot.  When BL1 executes, it unpacks the BL2 image from the FIP
26*91f16700Schasinglulu  * image into a region of memory set aside to hold it.  Similarly,
27*91f16700Schasinglulu  * BL2 unpacks BL31 into memory reserved for it, and unpacks U-Boot
28*91f16700Schasinglulu  * into high memory.
29*91f16700Schasinglulu  *
30*91f16700Schasinglulu  * Because the BL1 code is embedded in "l-loader", its base address
31*91f16700Schasinglulu  * in memory is derived from the base address of the "l-loader"
32*91f16700Schasinglulu  * text section, together with an offset.  Memory space for BL2 is
33*91f16700Schasinglulu  * reserved immediately following BL1, and memory space is reserved
34*91f16700Schasinglulu  * for BL31 after that.  ARM Trusted Firmware requires each of these
35*91f16700Schasinglulu  * memory regions to be aligned on page boundaries, so the size of
36*91f16700Schasinglulu  * each region is a multiple of a page size (ending in 000).  Note
37*91f16700Schasinglulu  * that ARM Trusted Firmware requires the read-only and read-write
38*91f16700Schasinglulu  * regions of memory used for BL1 to be defined separately.
39*91f16700Schasinglulu  *
40*91f16700Schasinglulu  *    ---------------------
41*91f16700Schasinglulu  *    |  (unused memory)  |
42*91f16700Schasinglulu  *    +-------------------+	- - - - -
43*91f16700Schasinglulu  *    |  (l-loader text)  |               \
44*91f16700Schasinglulu  *    +-------------------+                \
45*91f16700Schasinglulu  *    |  BL1 (read-only)  | \               \
46*91f16700Schasinglulu  *    |- - - - - - - - - -| |               |
47*91f16700Schasinglulu  *    |  BL1 (read-write) | |               |
48*91f16700Schasinglulu  *    +-------------------+  >  BL Memory   |
49*91f16700Schasinglulu  *    |  Reserved for BL2 | |                > "l-loader.bin" image
50*91f16700Schasinglulu  *    +-------------------+ |               |
51*91f16700Schasinglulu  *    | Reserved for BL31 | /               |
52*91f16700Schasinglulu  *    +-------------------+                 |
53*91f16700Schasinglulu  *           . . .                          /
54*91f16700Schasinglulu  *    +-------------------+                /
55*91f16700Schasinglulu  *    |        FIP        |               /
56*91f16700Schasinglulu  *    +-------------------+	- - - - -
57*91f16700Schasinglulu  *           . . .
58*91f16700Schasinglulu  *    |  (unused memory)  |
59*91f16700Schasinglulu  *           . . .
60*91f16700Schasinglulu  *    +-------------------+
61*91f16700Schasinglulu  *    |Reserved for U-Boot|
62*91f16700Schasinglulu  *    +-------------------+
63*91f16700Schasinglulu  *           . . .
64*91f16700Schasinglulu  *    |  (unused memory)  |
65*91f16700Schasinglulu  *    ---------------------
66*91f16700Schasinglulu  *
67*91f16700Schasinglulu  * The size of each of these regions is defined below.  The base
68*91f16700Schasinglulu  * address of the "l-loader" TEXT section and the offset of the BL1
69*91f16700Schasinglulu  * image within that serve as anchors for defining the positions of
70*91f16700Schasinglulu  * all other regions.  The FIP is placed in a section of its own.
71*91f16700Schasinglulu  *
72*91f16700Schasinglulu  * A "BASE" is the memory address of the start of a region; a "LIMIT"
73*91f16700Schasinglulu  * marks its end.  A "SIZE" is the size of a region (in bytes).  An
74*91f16700Schasinglulu  * "OFFSET" is an offset to the start of a region relative to the
75*91f16700Schasinglulu  * base of the "l-loader" TEXT section (also a multiple of page size).
76*91f16700Schasinglulu  */
77*91f16700Schasinglulu #define LLOADER_TEXT_BASE		0x02001000	/* page aligned */
78*91f16700Schasinglulu #define BL1_OFFSET			0x0000D000	/* page multiple */
79*91f16700Schasinglulu #define FIP_BASE			0x02040000
80*91f16700Schasinglulu 
81*91f16700Schasinglulu /*
82*91f16700Schasinglulu  * FIP_BASE_EMMC = 0x40000 - 0x1000
83*91f16700Schasinglulu  * = fip.bin offset - l-loader text offset
84*91f16700Schasinglulu  * in l-loader.bin
85*91f16700Schasinglulu  */
86*91f16700Schasinglulu #define FIP_BASE_EMMC			0x0003f000
87*91f16700Schasinglulu 
88*91f16700Schasinglulu #define BL1_RO_SIZE			0x00008000	/* page multiple */
89*91f16700Schasinglulu #define BL1_RW_SIZE			0x00008000	/* page multiple */
90*91f16700Schasinglulu #define BL1_SIZE			(BL1_RO_SIZE + BL1_RW_SIZE)
91*91f16700Schasinglulu #define BL2_SIZE			0x0000d000	/* page multiple */
92*91f16700Schasinglulu #define BL31_SIZE			0x00014000
93*91f16700Schasinglulu #if !POPLAR_RECOVERY
94*91f16700Schasinglulu /*
95*91f16700Schasinglulu  * emmc partition1 4096KB
96*91f16700Schasinglulu  * - l-loader.bin 1984KB
97*91f16700Schasinglulu  * |- l-loader + bl1.bin 256KB
98*91f16700Schasinglulu  * |- fip.bin 1728KB (0x001b0000)
99*91f16700Schasinglulu  * - u-boot persistent data 64KB
100*91f16700Schasinglulu  * - uefi persistent data 2048KB
101*91f16700Schasinglulu  */
102*91f16700Schasinglulu #define FIP_SIZE			0x001b0000  /* absolute max */
103*91f16700Schasinglulu #else
104*91f16700Schasinglulu /*
105*91f16700Schasinglulu  * same as above, but bootrom can only load an image (l-loader.bin) of
106*91f16700Schasinglulu  * 1024KB max, so after deducting the size of l-loader + bl1.bin (256KB),
107*91f16700Schasinglulu  * that leaves 768KB (0x000c0000) for fip.bin
108*91f16700Schasinglulu  */
109*91f16700Schasinglulu #define FIP_SIZE			0x000c0000  /* absolute max */
110*91f16700Schasinglulu #endif
111*91f16700Schasinglulu 
112*91f16700Schasinglulu      /* BL1_OFFSET */			/* (Defined above) */
113*91f16700Schasinglulu #define BL1_BASE			(LLOADER_TEXT_BASE + BL1_OFFSET)
114*91f16700Schasinglulu #define BL1_LIMIT			(BL1_BASE + BL1_SIZE)
115*91f16700Schasinglulu 
116*91f16700Schasinglulu #define BL1_RO_OFFSET			(BL1_OFFSET)
117*91f16700Schasinglulu #define BL1_RO_BASE			(LLOADER_TEXT_BASE + BL1_RO_OFFSET)
118*91f16700Schasinglulu #define BL1_RO_LIMIT			(BL1_RO_BASE + BL1_RO_SIZE)
119*91f16700Schasinglulu 
120*91f16700Schasinglulu #define BL1_RW_OFFSET			(BL1_RO_OFFSET + BL1_RO_SIZE)
121*91f16700Schasinglulu #define BL1_RW_BASE			(LLOADER_TEXT_BASE + BL1_RW_OFFSET)
122*91f16700Schasinglulu #define BL1_RW_LIMIT			(BL1_RW_BASE + BL1_RW_SIZE)
123*91f16700Schasinglulu 
124*91f16700Schasinglulu #define BL2_OFFSET			(BL1_OFFSET + BL1_SIZE)
125*91f16700Schasinglulu #define BL2_BASE			(LLOADER_TEXT_BASE + BL2_OFFSET)
126*91f16700Schasinglulu #define BL2_LIMIT			(BL2_BASE + BL2_SIZE)
127*91f16700Schasinglulu 
128*91f16700Schasinglulu #define BL31_OFFSET			(BL2_OFFSET + BL2_SIZE)
129*91f16700Schasinglulu #define BL31_BASE			(LLOADER_TEXT_BASE + BL31_OFFSET)
130*91f16700Schasinglulu #define BL31_LIMIT			(BL31_BASE + BL31_SIZE)
131*91f16700Schasinglulu 
132*91f16700Schasinglulu #endif /* POPLAR_LAYOUT_H */
133