1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef PLAT_PRIVATE_H 8*91f16700Schasinglulu #define PLAT_PRIVATE_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/bl_common.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include "hi3798cv200.h" 13*91f16700Schasinglulu 14*91f16700Schasinglulu void plat_configure_mmu_el3(unsigned long total_base, 15*91f16700Schasinglulu unsigned long total_size, 16*91f16700Schasinglulu unsigned long ro_start, 17*91f16700Schasinglulu unsigned long ro_limit, 18*91f16700Schasinglulu unsigned long coh_start, 19*91f16700Schasinglulu unsigned long coh_limit); 20*91f16700Schasinglulu 21*91f16700Schasinglulu void plat_configure_mmu_el1(unsigned long total_base, 22*91f16700Schasinglulu unsigned long total_size, 23*91f16700Schasinglulu unsigned long ro_start, 24*91f16700Schasinglulu unsigned long ro_limit, 25*91f16700Schasinglulu unsigned long coh_start, 26*91f16700Schasinglulu unsigned long coh_limit); 27*91f16700Schasinglulu 28*91f16700Schasinglulu void plat_io_setup(void); 29*91f16700Schasinglulu 30*91f16700Schasinglulu unsigned int poplar_calc_core_pos(u_register_t mpidr); 31*91f16700Schasinglulu 32*91f16700Schasinglulu void poplar_gic_driver_init(void); 33*91f16700Schasinglulu void poplar_gic_init(void); 34*91f16700Schasinglulu void poplar_gic_cpuif_enable(void); 35*91f16700Schasinglulu void poplar_gic_pcpu_init(void); 36*91f16700Schasinglulu 37*91f16700Schasinglulu #endif /* PLAT_PRIVATE_H */ 38