xref: /arm-trusted-firmware/plat/hisilicon/poplar/aarch64/platform_common.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu #include <errno.h>
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <arch_helpers.h>
11*91f16700Schasinglulu #include <common/bl_common.h>
12*91f16700Schasinglulu #include <common/debug.h>
13*91f16700Schasinglulu #include <drivers/delay_timer.h>
14*91f16700Schasinglulu #include <lib/mmio.h>
15*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables.h>
16*91f16700Schasinglulu #include <plat/common/platform.h>
17*91f16700Schasinglulu 
18*91f16700Schasinglulu #include "hi3798cv200.h"
19*91f16700Schasinglulu #include "platform_def.h"
20*91f16700Schasinglulu 
21*91f16700Schasinglulu #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
22*91f16700Schasinglulu 					DDR_SIZE,			\
23*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_NS)
24*91f16700Schasinglulu 
25*91f16700Schasinglulu #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
26*91f16700Schasinglulu 					DEVICE_SIZE,			\
27*91f16700Schasinglulu 					MT_DEVICE | MT_RW | MT_SECURE)
28*91f16700Schasinglulu 
29*91f16700Schasinglulu #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
30*91f16700Schasinglulu 					TSP_SEC_MEM_SIZE,		\
31*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_SECURE)
32*91f16700Schasinglulu 
33*91f16700Schasinglulu #ifdef SPD_opteed
34*91f16700Schasinglulu #define MAP_OPTEE_PAGEABLE	MAP_REGION_FLAT(		\
35*91f16700Schasinglulu 				POPLAR_OPTEE_PAGEABLE_LOAD_BASE,	\
36*91f16700Schasinglulu 				POPLAR_OPTEE_PAGEABLE_LOAD_SIZE,	\
37*91f16700Schasinglulu 				MT_MEMORY | MT_RW | MT_SECURE)
38*91f16700Schasinglulu #endif
39*91f16700Schasinglulu 
40*91f16700Schasinglulu static const mmap_region_t poplar_mmap[] = {
41*91f16700Schasinglulu 	MAP_DDR,
42*91f16700Schasinglulu 	MAP_DEVICE,
43*91f16700Schasinglulu 	MAP_TSP_MEM,
44*91f16700Schasinglulu #ifdef SPD_opteed
45*91f16700Schasinglulu 	MAP_OPTEE_PAGEABLE,
46*91f16700Schasinglulu #endif
47*91f16700Schasinglulu 	{0}
48*91f16700Schasinglulu };
49*91f16700Schasinglulu 
50*91f16700Schasinglulu #define DEFINE_CONFIGURE_MMU_EL(_el)					\
51*91f16700Schasinglulu 	void plat_configure_mmu_el##_el(unsigned long total_base,	\
52*91f16700Schasinglulu 				  unsigned long total_size,		\
53*91f16700Schasinglulu 				  unsigned long ro_start,		\
54*91f16700Schasinglulu 				  unsigned long ro_limit,		\
55*91f16700Schasinglulu 				  unsigned long coh_start,		\
56*91f16700Schasinglulu 				  unsigned long coh_limit)		\
57*91f16700Schasinglulu 	{								\
58*91f16700Schasinglulu 		mmap_add_region(total_base, total_base,			\
59*91f16700Schasinglulu 				total_size,				\
60*91f16700Schasinglulu 				MT_MEMORY | MT_RW | MT_SECURE);		\
61*91f16700Schasinglulu 		mmap_add_region(ro_start, ro_start,			\
62*91f16700Schasinglulu 				ro_limit - ro_start,			\
63*91f16700Schasinglulu 				MT_MEMORY | MT_RO | MT_SECURE);		\
64*91f16700Schasinglulu 		mmap_add_region(coh_start, coh_start,			\
65*91f16700Schasinglulu 				coh_limit - coh_start,			\
66*91f16700Schasinglulu 				MT_DEVICE | MT_RW | MT_SECURE);		\
67*91f16700Schasinglulu 		mmap_add(poplar_mmap);					\
68*91f16700Schasinglulu 		init_xlat_tables();					\
69*91f16700Schasinglulu 									\
70*91f16700Schasinglulu 		enable_mmu_el##_el(0);					\
71*91f16700Schasinglulu 	}
72*91f16700Schasinglulu 
73*91f16700Schasinglulu DEFINE_CONFIGURE_MMU_EL(3)
74*91f16700Schasinglulu DEFINE_CONFIGURE_MMU_EL(1)
75*91f16700Schasinglulu 
76*91f16700Schasinglulu unsigned int plat_get_syscnt_freq2(void)
77*91f16700Schasinglulu {
78*91f16700Schasinglulu 	return SYS_COUNTER_FREQ_IN_TICKS;
79*91f16700Schasinglulu }
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