xref: /arm-trusted-firmware/plat/hisilicon/hikey960/include/plat.ld.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7) 
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2022-2023, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu#ifndef PLAT_LD_S
7*91f16700Schasinglulu#define PLAT_LD_S
8*91f16700Schasinglulu
9*91f16700Schasinglulu#include <lib/xlat_tables/xlat_tables_defs.h>
10*91f16700Schasinglulu
11*91f16700SchasingluluMEMORY {
12*91f16700Schasinglulu    RAM2 (rw): ORIGIN = DDR2_SEC_BASE, LENGTH = DDR2_SEC_SIZE
13*91f16700Schasinglulu}
14*91f16700Schasinglulu
15*91f16700SchasingluluSECTIONS
16*91f16700Schasinglulu{
17*91f16700Schasinglulu	.ram2_region (NOLOAD) : {
18*91f16700Schasinglulu	*(.ram2_region)
19*91f16700Schasinglulu	}>RAM2
20*91f16700Schasinglulu}
21*91f16700Schasinglulu
22*91f16700Schasinglulu#endif /* PLAT_LD_S */
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