1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu #include <errno.h> 9*91f16700Schasinglulu #include <string.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <arch_helpers.h> 12*91f16700Schasinglulu #include <common/bl_common.h> 13*91f16700Schasinglulu #include <common/debug.h> 14*91f16700Schasinglulu #include <drivers/delay_timer.h> 15*91f16700Schasinglulu #include <lib/mmio.h> 16*91f16700Schasinglulu 17*91f16700Schasinglulu #include <hi3660.h> 18*91f16700Schasinglulu 19*91f16700Schasinglulu #define ADDR_CONVERT(addr) ((addr) < 0x40000 ? \ 20*91f16700Schasinglulu (addr) + 0xFFF30000 : \ 21*91f16700Schasinglulu (addr) + 0x40000000) 22*91f16700Schasinglulu 23*91f16700Schasinglulu static void fw_data_init(void) 24*91f16700Schasinglulu { 25*91f16700Schasinglulu unsigned long data_head_addr; 26*91f16700Schasinglulu unsigned int *data_addr; 27*91f16700Schasinglulu 28*91f16700Schasinglulu data_head_addr = mmio_read_32((uintptr_t) HISI_DATA_HEAD_BASE) + 0x14; 29*91f16700Schasinglulu data_addr = (unsigned int *) ADDR_CONVERT(data_head_addr); 30*91f16700Schasinglulu 31*91f16700Schasinglulu memcpy((void *)HISI_DATA0_BASE, 32*91f16700Schasinglulu (const void *)(unsigned long)ADDR_CONVERT(data_addr[0]), 33*91f16700Schasinglulu HISI_DATA0_SIZE); 34*91f16700Schasinglulu memcpy((void *)HISI_DATA1_BASE, 35*91f16700Schasinglulu (const void *)(unsigned long)ADDR_CONVERT(data_addr[1]), 36*91f16700Schasinglulu HISI_DATA1_SIZE); 37*91f16700Schasinglulu } 38*91f16700Schasinglulu 39*91f16700Schasinglulu int load_lpm3(void) 40*91f16700Schasinglulu { 41*91f16700Schasinglulu INFO("start fw loading\n"); 42*91f16700Schasinglulu 43*91f16700Schasinglulu fw_data_init(); 44*91f16700Schasinglulu 45*91f16700Schasinglulu flush_dcache_range((uintptr_t)HISI_RESERVED_MEM_BASE, 46*91f16700Schasinglulu HISI_RESERVED_MEM_SIZE); 47*91f16700Schasinglulu 48*91f16700Schasinglulu sev(); 49*91f16700Schasinglulu sev(); 50*91f16700Schasinglulu 51*91f16700Schasinglulu INFO("fw load success\n"); 52*91f16700Schasinglulu 53*91f16700Schasinglulu return 0; 54*91f16700Schasinglulu } 55