1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef HIKEY960_DEF_H 8*91f16700Schasinglulu #define HIKEY960_DEF_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/tbbr/tbbr_img_def.h> 11*91f16700Schasinglulu #include <plat/common/common_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define DDR_BASE 0x0 14*91f16700Schasinglulu #define DDR_SIZE 0xE0000000 15*91f16700Schasinglulu 16*91f16700Schasinglulu #define DEVICE_BASE 0xE0000000 17*91f16700Schasinglulu #define DEVICE_SIZE 0x20000000 18*91f16700Schasinglulu 19*91f16700Schasinglulu /* Memory location options for TSP */ 20*91f16700Schasinglulu #define HIKEY960_SRAM_ID 0 21*91f16700Schasinglulu #define HIKEY960_DRAM_ID 1 22*91f16700Schasinglulu 23*91f16700Schasinglulu /* 24*91f16700Schasinglulu * DDR for TEE (80MB from 0x3E00000-0x43000FFF) is divided into several 25*91f16700Schasinglulu * regions: 26*91f16700Schasinglulu * - SPMC manifest (4KB at the top) used by SPMC_AT_EL3 and the TEE 27*91f16700Schasinglulu * - Datastore for SPMC_AT_EL3 (4MB at the top) used by BL31 28*91f16700Schasinglulu * - Secure DDR (default is the top 60MB) used by OP-TEE 29*91f16700Schasinglulu * - Non-secure DDR used by OP-TEE (shared memory and padding) (4MB) 30*91f16700Schasinglulu * - Secure DDR (4MB aligned on 4MB) for OP-TEE's "Secure Data Path" feature 31*91f16700Schasinglulu * - Non-secure DDR (8MB) reserved for OP-TEE's future use 32*91f16700Schasinglulu */ 33*91f16700Schasinglulu #define DDR_SEC_SIZE 0x03C00000 /* reserve 60MB secure memory */ 34*91f16700Schasinglulu #define DDR_SEC_BASE 0x3F000000 35*91f16700Schasinglulu #define DDR2_SEC_SIZE 0x00400000 /* SPMC_AT_EL3: 4MB for BL31 RAM2 */ 36*91f16700Schasinglulu #define DDR2_SEC_BASE 0x42C00000 37*91f16700Schasinglulu #define DDR_SEC_CONFIG_SIZE 0x00001000 /* SPMC_AT_EL3: SPMC manifest */ 38*91f16700Schasinglulu #define DDR_SEC_CONFIG_BASE 0x43000000 39*91f16700Schasinglulu 40*91f16700Schasinglulu #define DDR_SDP_SIZE 0x00400000 41*91f16700Schasinglulu #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \ 42*91f16700Schasinglulu DDR_SDP_SIZE) 43*91f16700Schasinglulu 44*91f16700Schasinglulu /* 45*91f16700Schasinglulu * PL011 related constants 46*91f16700Schasinglulu */ 47*91f16700Schasinglulu #define PL011_UART5_BASE 0xFDF05000 48*91f16700Schasinglulu #define PL011_UART6_BASE 0xFFF32000 49*91f16700Schasinglulu #define PL011_BAUDRATE 115200 50*91f16700Schasinglulu #define PL011_UART_CLK_IN_HZ 19200000 51*91f16700Schasinglulu 52*91f16700Schasinglulu #define UFS_BASE 0 53*91f16700Schasinglulu 54*91f16700Schasinglulu #define HIKEY960_UFS_DESC_BASE 0x20000000 55*91f16700Schasinglulu #define HIKEY960_UFS_DESC_SIZE 0x00200000 /* 2MB */ 56*91f16700Schasinglulu #define HIKEY960_UFS_DATA_BASE 0x10000000 57*91f16700Schasinglulu #define HIKEY960_UFS_DATA_SIZE 0x0A000000 /* 160MB */ 58*91f16700Schasinglulu 59*91f16700Schasinglulu #if defined(SPMC_AT_EL3) 60*91f16700Schasinglulu /* 61*91f16700Schasinglulu * Number of Secure Partitions supported. 62*91f16700Schasinglulu * SPMC at EL3, uses this count to configure the maximum number of supported 63*91f16700Schasinglulu * secure partitions. 64*91f16700Schasinglulu */ 65*91f16700Schasinglulu #define SECURE_PARTITION_COUNT 1 66*91f16700Schasinglulu 67*91f16700Schasinglulu /* 68*91f16700Schasinglulu * Number of Nwld Partitions supported. 69*91f16700Schasinglulu * SPMC at EL3, uses this count to configure the maximum number of supported 70*91f16700Schasinglulu * nwld partitions. 71*91f16700Schasinglulu */ 72*91f16700Schasinglulu #define NS_PARTITION_COUNT 1 73*91f16700Schasinglulu /* 74*91f16700Schasinglulu * Number of Logical Partitions supported. 75*91f16700Schasinglulu * SPMC at EL3, uses this count to configure the maximum number of supported 76*91f16700Schasinglulu * logical partitions. 77*91f16700Schasinglulu */ 78*91f16700Schasinglulu #define MAX_EL3_LP_DESCS_COUNT 1 79*91f16700Schasinglulu 80*91f16700Schasinglulu #endif /* SPMC_AT_EL3 */ 81*91f16700Schasinglulu 82*91f16700Schasinglulu #endif /* HIKEY960_DEF_H */ 83