1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef HISI_PWRC_H 8*91f16700Schasinglulu #define HISI_PWRC_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <hi3660.h> 11*91f16700Schasinglulu #include <hi3660_crg.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define PCTRL_BASE (PCTRL_REG_BASE) 14*91f16700Schasinglulu #define CRG_BASE (CRG_REG_BASE) 15*91f16700Schasinglulu 16*91f16700Schasinglulu #define SOC_CRGPERIPH_A53_PDCEN_ADDR(base) ((base) + (0x260)) 17*91f16700Schasinglulu #define SOC_CRGPERIPH_MAIA_PDCEN_ADDR(base) ((base) + (0x300)) 18*91f16700Schasinglulu 19*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE0_LOCK_ADDR(base) ((base) + (0x400)) 20*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE0_UNLOCK_ADDR(base) ((base) + (0x404)) 21*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE0_LOCK_ST_ADDR(base) ((base) + (0x408)) 22*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE1_LOCK_ADDR(base) ((base) + (0x40C)) 23*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE1_UNLOCK_ADDR(base) ((base) + (0x410)) 24*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE1_LOCK_ST_ADDR(base) ((base) + (0x414)) 25*91f16700Schasinglulu #define SOC_PCTRL_RESOURCE2_LOCK_ADDR(base) ((base) + (0x418)) 26*91f16700Schasinglulu 27*91f16700Schasinglulu #define SOC_SCTRL_SCBAKDATA3_ADDR(base) ((base) + (0x418)) 28*91f16700Schasinglulu #define SOC_SCTRL_SCBAKDATA8_ADDR(base) ((base) + (0x42C)) 29*91f16700Schasinglulu #define SOC_SCTRL_SCBAKDATA9_ADDR(base) ((base) + (0x430)) 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define SOC_ACPU_SCTRL_BASE_ADDR (0xFFF0A000) 32*91f16700Schasinglulu 33*91f16700Schasinglulu void hisi_cpuidle_lock(unsigned int cluster, unsigned int core); 34*91f16700Schasinglulu void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core); 35*91f16700Schasinglulu void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core); 36*91f16700Schasinglulu void hisi_clear_cpuidle_flag(unsigned int cluster, unsigned int core); 37*91f16700Schasinglulu void hisi_set_cpu_boot_flag(unsigned int cluster, unsigned int core); 38*91f16700Schasinglulu void hisi_clear_cpu_boot_flag(unsigned int cluster, unsigned int core); 39*91f16700Schasinglulu int cluster_is_powered_on(unsigned int cluster); 40*91f16700Schasinglulu void hisi_enter_core_idle(unsigned int cluster, unsigned int core); 41*91f16700Schasinglulu void hisi_enter_cluster_idle(unsigned int cluster, unsigned int core); 42*91f16700Schasinglulu int hisi_test_ap_suspend_flag(void); 43*91f16700Schasinglulu void hisi_enter_ap_suspend(unsigned int cluster, unsigned int core); 44*91f16700Schasinglulu 45*91f16700Schasinglulu 46*91f16700Schasinglulu /* pdc api */ 47*91f16700Schasinglulu void hisi_pdc_mask_cluster_wakeirq(unsigned int cluster); 48*91f16700Schasinglulu int hisi_test_pwrdn_allcores(unsigned int cluster, unsigned int core); 49*91f16700Schasinglulu void hisi_disable_pdc(unsigned int cluster); 50*91f16700Schasinglulu void hisi_enable_pdc(unsigned int cluster); 51*91f16700Schasinglulu void hisi_powerup_core(unsigned int cluster, unsigned int core); 52*91f16700Schasinglulu void hisi_powerdn_core(unsigned int cluster, unsigned int core); 53*91f16700Schasinglulu void hisi_powerup_cluster(unsigned int cluster, unsigned int core); 54*91f16700Schasinglulu void hisi_powerdn_cluster(unsigned int cluster, unsigned int core); 55*91f16700Schasinglulu unsigned int hisi_test_cpu_down(unsigned int cluster, unsigned int core); 56*91f16700Schasinglulu 57*91f16700Schasinglulu #endif /* HISI_PWRC_H */ 58