xref: /arm-trusted-firmware/plat/hisilicon/hikey960/aarch64/hikey960_common.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <platform_def.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <arch_helpers.h>
12*91f16700Schasinglulu #include <common/bl_common.h>
13*91f16700Schasinglulu #include <common/debug.h>
14*91f16700Schasinglulu #include <lib/mmio.h>
15*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h>
16*91f16700Schasinglulu #include <plat/common/platform.h>
17*91f16700Schasinglulu 
18*91f16700Schasinglulu #include "../hikey960_def.h"
19*91f16700Schasinglulu #include "../hikey960_private.h"
20*91f16700Schasinglulu 
21*91f16700Schasinglulu #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
22*91f16700Schasinglulu 					DDR_SIZE - DDR_SEC_SIZE,	\
23*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_NS)
24*91f16700Schasinglulu 
25*91f16700Schasinglulu #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
26*91f16700Schasinglulu 					DEVICE_SIZE,			\
27*91f16700Schasinglulu 					MT_DEVICE | MT_RW | MT_SECURE)
28*91f16700Schasinglulu 
29*91f16700Schasinglulu #define MAP_BL1_RW	MAP_REGION_FLAT(BL1_RW_BASE,			\
30*91f16700Schasinglulu 					BL1_RW_LIMIT - BL1_RW_BASE,	\
31*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_NS)
32*91f16700Schasinglulu 
33*91f16700Schasinglulu #define MAP_UFS_DATA	MAP_REGION_FLAT(HIKEY960_UFS_DATA_BASE,		\
34*91f16700Schasinglulu 					HIKEY960_UFS_DATA_SIZE,		\
35*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_NS)
36*91f16700Schasinglulu 
37*91f16700Schasinglulu #define MAP_UFS_DESC	MAP_REGION_FLAT(HIKEY960_UFS_DESC_BASE,		\
38*91f16700Schasinglulu 					HIKEY960_UFS_DESC_SIZE,		\
39*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_NS)
40*91f16700Schasinglulu 
41*91f16700Schasinglulu #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
42*91f16700Schasinglulu 					TSP_SEC_MEM_SIZE,		\
43*91f16700Schasinglulu 					MT_MEMORY | MT_RW | MT_SECURE)
44*91f16700Schasinglulu 
45*91f16700Schasinglulu /*
46*91f16700Schasinglulu  * Table of regions for different BL stages to map using the MMU.
47*91f16700Schasinglulu  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
48*91f16700Schasinglulu  * hikey960_init_mmu_elx() will give the available subset of that,
49*91f16700Schasinglulu  */
50*91f16700Schasinglulu #ifdef IMAGE_BL1
51*91f16700Schasinglulu static const mmap_region_t hikey960_mmap[] = {
52*91f16700Schasinglulu 	MAP_UFS_DATA,
53*91f16700Schasinglulu 	MAP_BL1_RW,
54*91f16700Schasinglulu 	MAP_UFS_DESC,
55*91f16700Schasinglulu 	MAP_DEVICE,
56*91f16700Schasinglulu 	{0}
57*91f16700Schasinglulu };
58*91f16700Schasinglulu #endif
59*91f16700Schasinglulu 
60*91f16700Schasinglulu #ifdef IMAGE_BL2
61*91f16700Schasinglulu static const mmap_region_t hikey960_mmap[] = {
62*91f16700Schasinglulu 	MAP_DDR,
63*91f16700Schasinglulu 	MAP_DEVICE,
64*91f16700Schasinglulu 	MAP_TSP_MEM,
65*91f16700Schasinglulu 	{0}
66*91f16700Schasinglulu };
67*91f16700Schasinglulu #endif
68*91f16700Schasinglulu 
69*91f16700Schasinglulu #ifdef IMAGE_BL31
70*91f16700Schasinglulu static const mmap_region_t hikey960_mmap[] = {
71*91f16700Schasinglulu 	MAP_DEVICE,
72*91f16700Schasinglulu 	{0}
73*91f16700Schasinglulu };
74*91f16700Schasinglulu #endif
75*91f16700Schasinglulu 
76*91f16700Schasinglulu #ifdef IMAGE_BL32
77*91f16700Schasinglulu static const mmap_region_t hikey960_mmap[] = {
78*91f16700Schasinglulu 	MAP_DEVICE,
79*91f16700Schasinglulu 	MAP_DDR,
80*91f16700Schasinglulu 	{0}
81*91f16700Schasinglulu };
82*91f16700Schasinglulu #endif
83*91f16700Schasinglulu 
84*91f16700Schasinglulu /*
85*91f16700Schasinglulu  * Macro generating the code for the function setting up the pagetables as per
86*91f16700Schasinglulu  * the platform memory map & initialize the mmu, for the given exception level
87*91f16700Schasinglulu  */
88*91f16700Schasinglulu #define HIKEY960_CONFIGURE_MMU_EL(_el)					\
89*91f16700Schasinglulu 	void hikey960_init_mmu_el##_el(unsigned long total_base,	\
90*91f16700Schasinglulu 				unsigned long total_size,		\
91*91f16700Schasinglulu 				unsigned long ro_start,			\
92*91f16700Schasinglulu 				unsigned long ro_limit,			\
93*91f16700Schasinglulu 				unsigned long coh_start,		\
94*91f16700Schasinglulu 				unsigned long coh_limit)		\
95*91f16700Schasinglulu 	{								\
96*91f16700Schasinglulu 	       mmap_add_region(total_base, total_base,			\
97*91f16700Schasinglulu 			       total_size,				\
98*91f16700Schasinglulu 			       MT_MEMORY | MT_RW | MT_SECURE);		\
99*91f16700Schasinglulu 	       mmap_add_region(ro_start, ro_start,			\
100*91f16700Schasinglulu 			       ro_limit - ro_start,			\
101*91f16700Schasinglulu 			       MT_MEMORY | MT_RO | MT_SECURE);		\
102*91f16700Schasinglulu 	       mmap_add_region(coh_start, coh_start,			\
103*91f16700Schasinglulu 			       coh_limit - coh_start,			\
104*91f16700Schasinglulu 			       MT_DEVICE | MT_RW | MT_SECURE);		\
105*91f16700Schasinglulu 	       mmap_add(hikey960_mmap);					\
106*91f16700Schasinglulu 	       init_xlat_tables();					\
107*91f16700Schasinglulu 									\
108*91f16700Schasinglulu 	       enable_mmu_el##_el(0);					\
109*91f16700Schasinglulu 	}
110*91f16700Schasinglulu 
111*91f16700Schasinglulu /* Define EL1 and EL3 variants of the function initialising the MMU */
112*91f16700Schasinglulu HIKEY960_CONFIGURE_MMU_EL(1)
113*91f16700Schasinglulu HIKEY960_CONFIGURE_MMU_EL(3)
114*91f16700Schasinglulu 
115*91f16700Schasinglulu unsigned long plat_get_ns_image_entrypoint(void)
116*91f16700Schasinglulu {
117*91f16700Schasinglulu 	return NS_BL1U_BASE;
118*91f16700Schasinglulu }
119*91f16700Schasinglulu 
120*91f16700Schasinglulu unsigned int plat_get_syscnt_freq2(void)
121*91f16700Schasinglulu {
122*91f16700Schasinglulu 	return 1920000;
123*91f16700Schasinglulu }
124