xref: /arm-trusted-firmware/plat/hisilicon/hikey/platform.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu#
4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu#
6*91f16700Schasinglulu
7*91f16700Schasinglulu# Non-TF Boot ROM
8*91f16700SchasingluluRESET_TO_BL2	:=	1
9*91f16700Schasinglulu
10*91f16700Schasinglulu# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
11*91f16700Schasinglulu# or SRAM.
12*91f16700SchasingluluHIKEY_TSP_RAM_LOCATION	?=	dram
13*91f16700Schasingluluifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
14*91f16700Schasinglulu  HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
15*91f16700Schasingluluelse ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
16*91f16700Schasinglulu  HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
17*91f16700Schasingluluelse
18*91f16700Schasinglulu  $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
19*91f16700Schasingluluendif
20*91f16700Schasinglulu
21*91f16700SchasingluluCONSOLE_BASE			:=	PL011_UART3_BASE
22*91f16700SchasingluluCRASH_CONSOLE_BASE		:=	PL011_UART3_BASE
23*91f16700SchasingluluPLAT_PARTITION_MAX_ENTRIES	:=	12
24*91f16700SchasingluluPLAT_PL061_MAX_GPIOS		:=	160
25*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU		:=	1
26*91f16700SchasingluluPROGRAMMABLE_RESET_ADDRESS	:=	1
27*91f16700SchasingluluENABLE_SVE_FOR_NS		:=	0
28*91f16700Schasinglulu
29*91f16700Schasinglulu# Process flags
30*91f16700Schasinglulu$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
31*91f16700Schasinglulu$(eval $(call add_define,CONSOLE_BASE))
32*91f16700Schasinglulu$(eval $(call add_define,CRASH_CONSOLE_BASE))
33*91f16700Schasinglulu$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
34*91f16700Schasinglulu$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
35*91f16700Schasinglulu
36*91f16700Schasinglulu# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
37*91f16700Schasinglulu# in the FIP if the platform requires.
38*91f16700Schasingluluifneq ($(BL32_EXTRA1),)
39*91f16700Schasinglulu$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
40*91f16700Schasingluluendif
41*91f16700Schasingluluifneq ($(BL32_EXTRA2),)
42*91f16700Schasinglulu$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
43*91f16700Schasingluluendif
44*91f16700Schasinglulu
45*91f16700SchasingluluUSE_COHERENT_MEM	:=	1
46*91f16700Schasinglulu
47*91f16700SchasingluluPLAT_INCLUDES		:=	-Iplat/hisilicon/hikey/include
48*91f16700Schasinglulu
49*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/aarch64/pl011_console.S \
50*91f16700Schasinglulu				lib/xlat_tables/aarch64/xlat_tables.c	\
51*91f16700Schasinglulu				lib/xlat_tables/xlat_tables_common.c	\
52*91f16700Schasinglulu				plat/hisilicon/hikey/aarch64/hikey_common.c
53*91f16700Schasinglulu
54*91f16700SchasingluluBL1_SOURCES		+=	bl1/tbbr/tbbr_img_desc.c		\
55*91f16700Schasinglulu				drivers/arm/pl061/pl061_gpio.c		\
56*91f16700Schasinglulu				drivers/arm/sp804/sp804_delay_timer.c	\
57*91f16700Schasinglulu				drivers/delay_timer/delay_timer.c	\
58*91f16700Schasinglulu				drivers/gpio/gpio.c			\
59*91f16700Schasinglulu				drivers/io/io_block.c			\
60*91f16700Schasinglulu				drivers/io/io_fip.c			\
61*91f16700Schasinglulu				drivers/io/io_storage.c			\
62*91f16700Schasinglulu				drivers/mmc/mmc.c			\
63*91f16700Schasinglulu				drivers/synopsys/emmc/dw_mmc.c		\
64*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a53.S		\
65*91f16700Schasinglulu				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
66*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl1_setup.c	\
67*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl_common.c	\
68*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_io_storage.c
69*91f16700Schasinglulu
70*91f16700SchasingluluBL2_SOURCES		+=	common/desc_image_load.c		\
71*91f16700Schasinglulu				drivers/arm/pl061/pl061_gpio.c		\
72*91f16700Schasinglulu				drivers/arm/sp804/sp804_delay_timer.c	\
73*91f16700Schasinglulu				drivers/delay_timer/delay_timer.c	\
74*91f16700Schasinglulu				drivers/gpio/gpio.c			\
75*91f16700Schasinglulu				drivers/io/io_block.c			\
76*91f16700Schasinglulu				drivers/io/io_fip.c			\
77*91f16700Schasinglulu				drivers/io/io_storage.c			\
78*91f16700Schasinglulu				drivers/mmc/mmc.c			\
79*91f16700Schasinglulu				drivers/partition/gpt.c			\
80*91f16700Schasinglulu				drivers/partition/partition.c		\
81*91f16700Schasinglulu				drivers/synopsys/emmc/dw_mmc.c		\
82*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a53.S		\
83*91f16700Schasinglulu				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
84*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
85*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl2_setup.c	\
86*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl_common.c	\
87*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_security.c   \
88*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_ddr.c	\
89*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_image_load.c \
90*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_io_storage.c	\
91*91f16700Schasinglulu				plat/hisilicon/hikey/hisi_dvfs.c	\
92*91f16700Schasinglulu				plat/hisilicon/hikey/hisi_mcu.c
93*91f16700Schasinglulu
94*91f16700Schasingluluifeq (${SPD},opteed)
95*91f16700SchasingluluBL2_SOURCES		+=	lib/optee/optee_utils.c
96*91f16700Schasingluluendif
97*91f16700Schasinglulu
98*91f16700Schasingluluinclude lib/zlib/zlib.mk
99*91f16700SchasingluluPLAT_INCLUDES		+=	-Ilib/zlib
100*91f16700SchasingluluBL2_SOURCES		+=	$(ZLIB_SOURCES)
101*91f16700Schasinglulu
102*91f16700SchasingluluHIKEY_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
103*91f16700Schasinglulu				drivers/arm/gic/v2/gicv2_main.c		\
104*91f16700Schasinglulu				drivers/arm/gic/v2/gicv2_helpers.c	\
105*91f16700Schasinglulu				plat/common/plat_gicv2.c
106*91f16700Schasinglulu
107*91f16700SchasingluluBL31_SOURCES		+=	drivers/arm/cci/cci.c			\
108*91f16700Schasinglulu				drivers/arm/sp804/sp804_delay_timer.c	\
109*91f16700Schasinglulu				drivers/delay_timer/delay_timer.c	\
110*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a53.S		\
111*91f16700Schasinglulu				plat/common/plat_psci_common.c	\
112*91f16700Schasinglulu				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
113*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_bl31_setup.c	\
114*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_pm.c		\
115*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_topology.c	\
116*91f16700Schasinglulu				plat/hisilicon/hikey/hisi_ipc.c		\
117*91f16700Schasinglulu				plat/hisilicon/hikey/hisi_pwrc.c	\
118*91f16700Schasinglulu				plat/hisilicon/hikey/hisi_pwrc_sram.S	\
119*91f16700Schasinglulu				${HIKEY_GIC_SOURCES}
120*91f16700Schasingluluifeq (${ENABLE_PMF}, 1)
121*91f16700SchasingluluBL31_SOURCES		+=	plat/hisilicon/hikey/hisi_sip_svc.c			\
122*91f16700Schasinglulu				lib/pmf/pmf_smc.c
123*91f16700Schasingluluendif
124*91f16700Schasinglulu
125*91f16700Schasingluluifneq (${TRUSTED_BOARD_BOOT},0)
126*91f16700Schasinglulu
127*91f16700Schasingluluinclude drivers/auth/mbedtls/mbedtls_crypto.mk
128*91f16700Schasingluluinclude drivers/auth/mbedtls/mbedtls_x509.mk
129*91f16700Schasinglulu
130*91f16700SchasingluluAUTH_SOURCES		:=	drivers/auth/auth_mod.c			\
131*91f16700Schasinglulu				drivers/auth/crypto_mod.c		\
132*91f16700Schasinglulu				drivers/auth/img_parser_mod.c		\
133*91f16700Schasinglulu				drivers/auth/tbbr/tbbr_cot_common.c
134*91f16700Schasinglulu
135*91f16700SchasingluluBL1_SOURCES		+=	${AUTH_SOURCES}				\
136*91f16700Schasinglulu				plat/common/tbbr/plat_tbbr.c		\
137*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_tbbr.c	\
138*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_rotpk.S	\
139*91f16700Schasinglulu				drivers/auth/tbbr/tbbr_cot_bl1.c
140*91f16700Schasinglulu
141*91f16700SchasingluluBL2_SOURCES		+=	${AUTH_SOURCES}				\
142*91f16700Schasinglulu				plat/common/tbbr/plat_tbbr.c		\
143*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_tbbr.c	\
144*91f16700Schasinglulu				plat/hisilicon/hikey/hikey_rotpk.S	\
145*91f16700Schasinglulu				drivers/auth/tbbr/tbbr_cot_bl2.c
146*91f16700Schasinglulu
147*91f16700SchasingluluROT_KEY		=	$(BUILD_PLAT)/rot_key.pem
148*91f16700SchasingluluROTPK_HASH		=	$(BUILD_PLAT)/rotpk_sha256.bin
149*91f16700Schasinglulu
150*91f16700Schasinglulu$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
151*91f16700Schasinglulu$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH)
152*91f16700Schasinglulu$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH)
153*91f16700Schasinglulu
154*91f16700Schasinglulucertificates: $(ROT_KEY)
155*91f16700Schasinglulu$(ROT_KEY): | $(BUILD_PLAT)
156*91f16700Schasinglulu	@echo "  OPENSSL $@"
157*91f16700Schasinglulu	$(Q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null
158*91f16700Schasinglulu
159*91f16700Schasinglulu$(ROTPK_HASH): $(ROT_KEY)
160*91f16700Schasinglulu	@echo "  OPENSSL $@"
161*91f16700Schasinglulu	$(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
162*91f16700Schasinglulu	${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
163*91f16700Schasingluluendif
164*91f16700Schasinglulu
165*91f16700Schasinglulu# Enable workarounds for selected Cortex-A53 errata.
166*91f16700SchasingluluERRATA_A53_836870		:=	1
167*91f16700SchasingluluERRATA_A53_843419		:=	1
168*91f16700SchasingluluERRATA_A53_855873		:=	1
169*91f16700Schasinglulu
170*91f16700SchasingluluWORKAROUND_CVE_2017_5715	:=	0
171*91f16700Schasinglulu
172*91f16700SchasingluluFIP_ALIGN			:=	512
173