1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef HISI_IPC_H 8*91f16700Schasinglulu #define HISI_IPC_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define HISI_IPC_CORE_ACPU 0x0 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU0_PD 10 13*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU1_PD 11 14*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU2_PD 12 15*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU3_PD 13 16*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU_PD 16 17*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU4_PD 26 18*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU5_PD 27 19*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU6_PD 28 20*91f16700Schasinglulu #define HISI_IPC_MCU_INT_SRC_ACPU7_PD 29 21*91f16700Schasinglulu 22*91f16700Schasinglulu #define HISI_IPC_SEM_CPUIDLE 27 23*91f16700Schasinglulu #define HISI_IPC_INT_SRC_NUM 32 24*91f16700Schasinglulu 25*91f16700Schasinglulu #define HISI_IPC_PM_ON 0 26*91f16700Schasinglulu #define HISI_IPC_PM_OFF 1 27*91f16700Schasinglulu 28*91f16700Schasinglulu #define HISI_IPC_OK (0) 29*91f16700Schasinglulu #define HISI_IPC_ERROR (-1) 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define HISI_IPC_BASE_ADDR (0xF7510000) 32*91f16700Schasinglulu #define HISI_IPC_CPU_RAW_INT_ADDR (0xF7510420) 33*91f16700Schasinglulu #define HISI_IPC_ACPU_CTRL(i) (0xF7510800 + (i << 3)) 34*91f16700Schasinglulu 35*91f16700Schasinglulu void hisi_ipc_spin_lock(unsigned int signal); 36*91f16700Schasinglulu void hisi_ipc_spin_unlock(unsigned int signal); 37*91f16700Schasinglulu void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster); 38*91f16700Schasinglulu void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster); 39*91f16700Schasinglulu void hisi_ipc_cpu_suspend(unsigned int cpu, unsigned int cluster); 40*91f16700Schasinglulu void hisi_ipc_cluster_on(unsigned int cpu, unsigned int cluster); 41*91f16700Schasinglulu void hisi_ipc_cluster_off(unsigned int cpu, unsigned int cluster); 42*91f16700Schasinglulu void hisi_ipc_cluster_suspend(unsigned int cpu, unsigned int cluster); 43*91f16700Schasinglulu void hisi_ipc_psci_system_off(void); 44*91f16700Schasinglulu int hisi_ipc_init(void); 45*91f16700Schasinglulu 46*91f16700Schasinglulu #endif /* HISI_IPC_H */ 47