xref: /arm-trusted-firmware/plat/hisilicon/hikey/include/hi6553.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef HI6553_H
8*91f16700Schasinglulu #define HI6553_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <lib/mmio.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include <hi6220.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu #define HI6553_DISABLE6_XO_CLK			(PMUSSI_BASE + (0x036 << 2))
15*91f16700Schasinglulu 
16*91f16700Schasinglulu #define DISABLE6_XO_CLK_BB			(1 << 0)
17*91f16700Schasinglulu #define DISABLE6_XO_CLK_CONN			(1 << 1)
18*91f16700Schasinglulu #define DISABLE6_XO_CLK_NFC			(1 << 2)
19*91f16700Schasinglulu #define DISABLE6_XO_CLK_RF1			(1 << 3)
20*91f16700Schasinglulu #define DISABLE6_XO_CLK_RF2			(1 << 4)
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #define HI6553_VERSION_REG			(PMUSSI_BASE + (0x000 << 2))
23*91f16700Schasinglulu #define HI6553_IRQ2_MASK			(PMUSSI_BASE + (0x008 << 2))
24*91f16700Schasinglulu #define HI6553_ENABLE2_LDO1_8			(PMUSSI_BASE + (0x029 << 2))
25*91f16700Schasinglulu #define HI6553_DISABLE2_LDO1_8			(PMUSSI_BASE + (0x02a << 2))
26*91f16700Schasinglulu #define HI6553_ONOFF_STATUS2_LDO1_8		(PMUSSI_BASE + (0x02b << 2))
27*91f16700Schasinglulu #define HI6553_ENABLE3_LDO9_16			(PMUSSI_BASE + (0x02c << 2))
28*91f16700Schasinglulu #define HI6553_DISABLE3_LDO9_16			(PMUSSI_BASE + (0x02d << 2))
29*91f16700Schasinglulu #define HI6553_ONOFF_STATUS3_LDO9_16		(PMUSSI_BASE + (0x02e << 2))
30*91f16700Schasinglulu #define HI6553_ENABLE4_LDO17_22			(PMUSSI_BASE + (0x02f << 2))
31*91f16700Schasinglulu #define HI6553_DISABLE4_LDO17_22		(PMUSSI_BASE + (0x030 << 2))
32*91f16700Schasinglulu #define HI6553_ONOFF_STATUS4_LDO17_22		(PMUSSI_BASE + (0x031 << 2))
33*91f16700Schasinglulu #define HI6553_PERI_EN_MARK			(PMUSSI_BASE + (0x040 << 2))
34*91f16700Schasinglulu #define HI6553_BUCK2_REG1			(PMUSSI_BASE + (0x04a << 2))
35*91f16700Schasinglulu #define HI6553_BUCK2_REG5			(PMUSSI_BASE + (0x04e << 2))
36*91f16700Schasinglulu #define HI6553_BUCK2_REG6			(PMUSSI_BASE + (0x04f << 2))
37*91f16700Schasinglulu #define HI6553_BUCK3_REG3			(PMUSSI_BASE + (0x054 << 2))
38*91f16700Schasinglulu #define HI6553_BUCK3_REG5			(PMUSSI_BASE + (0x056 << 2))
39*91f16700Schasinglulu #define HI6553_BUCK3_REG6			(PMUSSI_BASE + (0x057 << 2))
40*91f16700Schasinglulu #define HI6553_BUCK4_REG2			(PMUSSI_BASE + (0x05b << 2))
41*91f16700Schasinglulu #define HI6553_BUCK4_REG5			(PMUSSI_BASE + (0x05e << 2))
42*91f16700Schasinglulu #define HI6553_BUCK4_REG6			(PMUSSI_BASE + (0x05f << 2))
43*91f16700Schasinglulu #define HI6553_CLK_TOP0				(PMUSSI_BASE + (0x063 << 2))
44*91f16700Schasinglulu #define HI6553_CLK_TOP3				(PMUSSI_BASE + (0x066 << 2))
45*91f16700Schasinglulu #define HI6553_CLK_TOP4				(PMUSSI_BASE + (0x067 << 2))
46*91f16700Schasinglulu #define HI6553_VSET_BUCK2_ADJ			(PMUSSI_BASE + (0x06d << 2))
47*91f16700Schasinglulu #define HI6553_VSET_BUCK3_ADJ			(PMUSSI_BASE + (0x06e << 2))
48*91f16700Schasinglulu #define HI6553_LDO7_REG_ADJ			(PMUSSI_BASE + (0x078 << 2))
49*91f16700Schasinglulu #define HI6553_LDO10_REG_ADJ			(PMUSSI_BASE + (0x07b << 2))
50*91f16700Schasinglulu #define HI6553_LDO15_REG_ADJ			(PMUSSI_BASE + (0x080 << 2))
51*91f16700Schasinglulu #define HI6553_LDO19_REG_ADJ			(PMUSSI_BASE + (0x084 << 2))
52*91f16700Schasinglulu #define HI6553_LDO20_REG_ADJ			(PMUSSI_BASE + (0x085 << 2))
53*91f16700Schasinglulu #define HI6553_LDO21_REG_ADJ			(PMUSSI_BASE + (0x086 << 2))
54*91f16700Schasinglulu #define HI6553_LDO22_REG_ADJ			(PMUSSI_BASE + (0x087 << 2))
55*91f16700Schasinglulu #define HI6553_DR_LED_CTRL			(PMUSSI_BASE + (0x098 << 2))
56*91f16700Schasinglulu #define HI6553_DR_OUT_CTRL			(PMUSSI_BASE + (0x099 << 2))
57*91f16700Schasinglulu #define HI6553_DR3_ISET				(PMUSSI_BASE + (0x09a << 2))
58*91f16700Schasinglulu #define HI6553_DR3_START_DEL			(PMUSSI_BASE + (0x09b << 2))
59*91f16700Schasinglulu #define HI6553_DR4_ISET				(PMUSSI_BASE + (0x09c << 2))
60*91f16700Schasinglulu #define HI6553_DR4_START_DEL			(PMUSSI_BASE + (0x09d << 2))
61*91f16700Schasinglulu #define HI6553_DR345_TIM_CONF0			(PMUSSI_BASE + (0x0a0 << 2))
62*91f16700Schasinglulu #define HI6553_NP_REG_ADJ1			(PMUSSI_BASE + (0x0be << 2))
63*91f16700Schasinglulu #define HI6553_NP_REG_CHG			(PMUSSI_BASE + (0x0c0 << 2))
64*91f16700Schasinglulu #define HI6553_BUCK01_CTRL2			(PMUSSI_BASE + (0x0d9 << 2))
65*91f16700Schasinglulu #define HI6553_BUCK0_CTRL1			(PMUSSI_BASE + (0x0dd << 2))
66*91f16700Schasinglulu #define HI6553_BUCK0_CTRL5			(PMUSSI_BASE + (0x0e1 << 2))
67*91f16700Schasinglulu #define HI6553_BUCK0_CTRL7			(PMUSSI_BASE + (0x0e3 << 2))
68*91f16700Schasinglulu #define HI6553_BUCK1_CTRL1			(PMUSSI_BASE + (0x0e8 << 2))
69*91f16700Schasinglulu #define HI6553_BUCK1_CTRL5			(PMUSSI_BASE + (0x0ec << 2))
70*91f16700Schasinglulu #define HI6553_BUCK1_CTRL7			(PMUSSI_BASE + (0x0ef << 2))
71*91f16700Schasinglulu #define HI6553_CLK19M2_600_586_EN		(PMUSSI_BASE + (0x0fe << 2))
72*91f16700Schasinglulu 
73*91f16700Schasinglulu #define LED_START_DELAY_TIME			0x00
74*91f16700Schasinglulu #define LED_ELEC_VALUE				0x07
75*91f16700Schasinglulu #define LED_LIGHT_TIME				0xf0
76*91f16700Schasinglulu #define LED_GREEN_ENABLE			(1 << 1)
77*91f16700Schasinglulu #define LED_OUT_CTRL				0x00
78*91f16700Schasinglulu 
79*91f16700Schasinglulu #define PMU_HI6552_V300				0x30
80*91f16700Schasinglulu #define PMU_HI6552_V310				0x31
81*91f16700Schasinglulu 
82*91f16700Schasinglulu #endif /* HI6553_H */
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