1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef HI6220_REGS_PIN_H 8*91f16700Schasinglulu #define HI6220_REGS_PIN_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define IOMG_BASE 0xF7010000 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define IOMG_SD_CLK (IOMG_BASE + 0x0C) 13*91f16700Schasinglulu #define IOMG_SD_CMD (IOMG_BASE + 0x10) 14*91f16700Schasinglulu #define IOMG_SD_DATA0 (IOMG_BASE + 0x14) 15*91f16700Schasinglulu #define IOMG_SD_DATA1 (IOMG_BASE + 0x18) 16*91f16700Schasinglulu #define IOMG_SD_DATA2 (IOMG_BASE + 0x1C) 17*91f16700Schasinglulu #define IOMG_SD_DATA3 (IOMG_BASE + 0x20) 18*91f16700Schasinglulu #define IOMG_GPIO24 (IOMG_BASE + 0x140) 19*91f16700Schasinglulu 20*91f16700Schasinglulu #define IOMG_MUX_FUNC0 0 21*91f16700Schasinglulu #define IOMG_MUX_FUNC1 1 22*91f16700Schasinglulu #define IOMG_MUX_FUNC2 2 23*91f16700Schasinglulu 24*91f16700Schasinglulu #define IOCG1_BASE 0xF7010800 25*91f16700Schasinglulu #define IOCG2_BASE 0xF8001800 26*91f16700Schasinglulu 27*91f16700Schasinglulu #define IOCG_SD_CLK (IOCG1_BASE + 0x0C) 28*91f16700Schasinglulu #define IOCG_SD_CMD (IOCG1_BASE + 0x10) 29*91f16700Schasinglulu #define IOCG_SD_DATA0 (IOCG1_BASE + 0x14) 30*91f16700Schasinglulu #define IOCG_SD_DATA1 (IOCG1_BASE + 0x18) 31*91f16700Schasinglulu #define IOCG_SD_DATA2 (IOCG1_BASE + 0x1C) 32*91f16700Schasinglulu #define IOCG_SD_DATA3 (IOCG1_BASE + 0x20) 33*91f16700Schasinglulu #define IOCG_GPIO24 (IOCG1_BASE + 0x150) 34*91f16700Schasinglulu #define IOCG_GPIO8 (IOCG2_BASE + 0x30) 35*91f16700Schasinglulu 36*91f16700Schasinglulu #define IOCG_DRIVE_8MA (2 << 4) 37*91f16700Schasinglulu #define IOCG_DRIVE_10MA (3 << 4) 38*91f16700Schasinglulu #define IOCG_INPUT_16MA 0x64 39*91f16700Schasinglulu #define IOCG_INPUT_12MA 0x54 40*91f16700Schasinglulu #define IOCG_PULLDOWN (1 << 1) 41*91f16700Schasinglulu #define IOCG_PULLUP (1 << 0) 42*91f16700Schasinglulu 43*91f16700Schasinglulu #endif /* HI6220_REGS_PIN_H */ 44