1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017 - 2020, Broadcom 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SR_UTILS_H 8*91f16700Schasinglulu #define SR_UTILS_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/mmio.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include <chip_id.h> 13*91f16700Schasinglulu #include <cmn_plat_util.h> 14*91f16700Schasinglulu #include <sr_def.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu static inline void brcm_stingray_set_qspi_mux(int enable_ap) 17*91f16700Schasinglulu { 18*91f16700Schasinglulu mmio_write_32(QSPI_HOLD_N_MODE_SEL_CONTROL, enable_ap); 19*91f16700Schasinglulu mmio_write_32(QSPI_WP_N_MODE_SEL_CONTROL, enable_ap); 20*91f16700Schasinglulu mmio_write_32(QSPI_SCK_MODE_SEL_CONTROL, enable_ap); 21*91f16700Schasinglulu mmio_write_32(QSPI_CS_N_MODE_SEL_CONTROL, enable_ap); 22*91f16700Schasinglulu mmio_write_32(QSPI_MOSI_MODE_SEL_CONTROL, enable_ap); 23*91f16700Schasinglulu mmio_write_32(QSPI_MISO_MODE_SEL_CONTROL, enable_ap); 24*91f16700Schasinglulu } 25*91f16700Schasinglulu 26*91f16700Schasinglulu static inline void brcm_stingray_set_straps(uint32_t boot_source) 27*91f16700Schasinglulu { 28*91f16700Schasinglulu /* Enable software strap override */ 29*91f16700Schasinglulu mmio_setbits_32(CDRU_CHIP_STRAP_CTRL, 30*91f16700Schasinglulu BIT(CDRU_CHIP_STRAP_CTRL__SOFTWARE_OVERRIDE)); 31*91f16700Schasinglulu 32*91f16700Schasinglulu /* set straps to the next boot source */ 33*91f16700Schasinglulu mmio_clrsetbits_32(CDRU_CHIP_STRAP_DATA, 34*91f16700Schasinglulu BOOT_SOURCE_MASK, 35*91f16700Schasinglulu boot_source); 36*91f16700Schasinglulu 37*91f16700Schasinglulu /* Disable software strap override */ 38*91f16700Schasinglulu mmio_clrbits_32(CDRU_CHIP_STRAP_CTRL, 39*91f16700Schasinglulu BIT(CDRU_CHIP_STRAP_CTRL__SOFTWARE_OVERRIDE)); 40*91f16700Schasinglulu } 41*91f16700Schasinglulu 42*91f16700Schasinglulu #endif 43