1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015 - 2020, Broadcom 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef CMN_PLAT_UTIL_H 8*91f16700Schasinglulu #define CMN_PLAT_UTIL_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/mmio.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* BOOT source */ 13*91f16700Schasinglulu #define BOOT_SOURCE_MASK 7 14*91f16700Schasinglulu #define BOOT_SOURCE_QSPI 0 15*91f16700Schasinglulu #define BOOT_SOURCE_NAND 1 16*91f16700Schasinglulu #define BOOT_SOURCE_SPI_NAND 2 17*91f16700Schasinglulu #define BOOT_SOURCE_UART 3 18*91f16700Schasinglulu #define BOOT_SOURCE_RES4 4 19*91f16700Schasinglulu #define BOOT_SOURCE_EMMC 5 20*91f16700Schasinglulu #define BOOT_SOURCE_ATE 6 21*91f16700Schasinglulu #define BOOT_SOURCE_USB 7 22*91f16700Schasinglulu #define BOOT_SOURCE_MAX 8 23*91f16700Schasinglulu #define BOOT_SOURCE_UNKNOWN (-1) 24*91f16700Schasinglulu 25*91f16700Schasinglulu #define KHMAC_SHA256_KEY_SIZE 32 26*91f16700Schasinglulu 27*91f16700Schasinglulu #define SOFT_PWR_UP_RESET_L0 0 28*91f16700Schasinglulu #define SOFT_SYS_RESET_L1 1 29*91f16700Schasinglulu #define SOFT_RESET_L3 0x3 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define BOOT_SOURCE_SOFT_DATA_OFFSET 8 32*91f16700Schasinglulu #define BOOT_SOURCE_SOFT_ENABLE_OFFSET 14 33*91f16700Schasinglulu #define BOOT_SOURCE_SOFT_ENABLE_MASK BIT(BOOT_SOURCE_SOFT_ENABLE_OFFSET) 34*91f16700Schasinglulu 35*91f16700Schasinglulu typedef struct _key { 36*91f16700Schasinglulu uint8_t hmac_sha256[KHMAC_SHA256_KEY_SIZE]; 37*91f16700Schasinglulu } cmn_key_t; 38*91f16700Schasinglulu 39*91f16700Schasinglulu uint32_t boot_source_get(void); 40*91f16700Schasinglulu void bl1_platform_wait_events(void); 41*91f16700Schasinglulu void plat_soft_reset(uint32_t reset); 42*91f16700Schasinglulu 43*91f16700Schasinglulu #endif 44