1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016 - 2020, Broadcom 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <brcm_def.h> 8*91f16700Schasinglulu #include <plat_brcm.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #if IMAGE_BL2 11*91f16700Schasinglulu const mmap_region_t plat_brcm_mmap[] = { 12*91f16700Schasinglulu HSLS_REGION, 13*91f16700Schasinglulu BRCM_MAP_SHARED_RAM, 14*91f16700Schasinglulu BRCM_MAP_NAND_RO, 15*91f16700Schasinglulu BRCM_MAP_QSPI_RO, 16*91f16700Schasinglulu #ifdef PERIPH0_REGION 17*91f16700Schasinglulu PERIPH0_REGION, 18*91f16700Schasinglulu #endif 19*91f16700Schasinglulu #ifdef PERIPH1_REGION 20*91f16700Schasinglulu PERIPH1_REGION, 21*91f16700Schasinglulu #endif 22*91f16700Schasinglulu #ifdef USE_DDR 23*91f16700Schasinglulu BRCM_MAP_NS_DRAM1, 24*91f16700Schasinglulu #if BRCM_BL31_IN_DRAM 25*91f16700Schasinglulu BRCM_MAP_BL31_SEC_DRAM, 26*91f16700Schasinglulu #endif 27*91f16700Schasinglulu #else 28*91f16700Schasinglulu #ifdef BRCM_MAP_EXT_SRAM 29*91f16700Schasinglulu BRCM_MAP_EXT_SRAM, 30*91f16700Schasinglulu #endif 31*91f16700Schasinglulu #endif 32*91f16700Schasinglulu #if defined(USE_CRMU_SRAM) && defined(CRMU_SRAM_BASE) 33*91f16700Schasinglulu CRMU_SRAM_REGION, 34*91f16700Schasinglulu #endif 35*91f16700Schasinglulu {0} 36*91f16700Schasinglulu }; 37*91f16700Schasinglulu #endif 38*91f16700Schasinglulu 39*91f16700Schasinglulu #if IMAGE_BL31 40*91f16700Schasinglulu const mmap_region_t plat_brcm_mmap[] = { 41*91f16700Schasinglulu HSLS_REGION, 42*91f16700Schasinglulu #ifdef PERIPH0_REGION 43*91f16700Schasinglulu PERIPH0_REGION, 44*91f16700Schasinglulu #endif 45*91f16700Schasinglulu #ifdef PERIPH1_REGION 46*91f16700Schasinglulu PERIPH1_REGION, 47*91f16700Schasinglulu #endif 48*91f16700Schasinglulu #ifdef PERIPH2_REGION 49*91f16700Schasinglulu PERIPH2_REGION, 50*91f16700Schasinglulu #endif 51*91f16700Schasinglulu #ifdef USB_REGION 52*91f16700Schasinglulu USB_REGION, 53*91f16700Schasinglulu #endif 54*91f16700Schasinglulu #ifdef USE_DDR 55*91f16700Schasinglulu BRCM_MAP_NS_DRAM1, 56*91f16700Schasinglulu #ifdef BRCM_MAP_NS_SHARED_DRAM 57*91f16700Schasinglulu BRCM_MAP_NS_SHARED_DRAM, 58*91f16700Schasinglulu #endif 59*91f16700Schasinglulu #else 60*91f16700Schasinglulu #ifdef BRCM_MAP_EXT_SRAM 61*91f16700Schasinglulu BRCM_MAP_EXT_SRAM, 62*91f16700Schasinglulu #endif 63*91f16700Schasinglulu #endif 64*91f16700Schasinglulu #if defined(USE_CRMU_SRAM) && defined(CRMU_SRAM_BASE) 65*91f16700Schasinglulu CRMU_SRAM_REGION, 66*91f16700Schasinglulu #endif 67*91f16700Schasinglulu {0} 68*91f16700Schasinglulu }; 69*91f16700Schasinglulu #endif 70*91f16700Schasinglulu 71*91f16700Schasinglulu CASSERT((ARRAY_SIZE(plat_brcm_mmap) - 1) <= PLAT_BRCM_MMAP_ENTRIES, 72*91f16700Schasinglulu assert_plat_brcm_mmap_mismatch); 73*91f16700Schasinglulu CASSERT((PLAT_BRCM_MMAP_ENTRIES + BRCM_BL_REGIONS) <= MAX_MMAP_REGIONS, 74*91f16700Schasinglulu assert_max_mmap_regions); 75