1*91f16700Schasinglulu /* SPDX-License-Identifier: BSD-3-Clause */ 2*91f16700Schasinglulu /* 3*91f16700Schasinglulu * Copyright (C) 2024, Charleye <wangkart@aliyun.com> 4*91f16700Schasinglulu * All rights reserved. 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <drivers/arm/gicv2.h> 8*91f16700Schasinglulu #include <drivers/arm/gic_common.h> 9*91f16700Schasinglulu #include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu static const interrupt_prop_t lmt_interrupt_props[] = { 12*91f16700Schasinglulu PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), 13*91f16700Schasinglulu PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) 14*91f16700Schasinglulu }; 15*91f16700Schasinglulu 16*91f16700Schasinglulu static const struct gicv2_driver_data plat_gicv2_driver_data = { 17*91f16700Schasinglulu .gicd_base = GICD_BASE, 18*91f16700Schasinglulu .gicc_base = GICC_BASE, 19*91f16700Schasinglulu .interrupt_props = lmt_interrupt_props, 20*91f16700Schasinglulu .interrupt_props_num = ARRAY_SIZE(lmt_interrupt_props), 21*91f16700Schasinglulu }; 22*91f16700Schasinglulu 23*91f16700Schasinglulu void plat_lmt_gic_init(void) 24*91f16700Schasinglulu { 25*91f16700Schasinglulu /* Initialize the gic cpu and distributor interfaces */ 26*91f16700Schasinglulu gicv2_driver_init(&plat_gicv2_driver_data); 27*91f16700Schasinglulu gicv2_distif_init(); 28*91f16700Schasinglulu gicv2_pcpu_distif_init(); 29*91f16700Schasinglulu gicv2_cpuif_enable(); 30*91f16700Schasinglulu } 31*91f16700Schasinglulu 32*91f16700Schasinglulu void lmt_pwr_gic_on_finish(void) 33*91f16700Schasinglulu { 34*91f16700Schasinglulu /* TODO: This setup is needed only after a cold boot */ 35*91f16700Schasinglulu gicv2_pcpu_distif_init(); 36*91f16700Schasinglulu 37*91f16700Schasinglulu /* Enable the gic cpu interface */ 38*91f16700Schasinglulu gicv2_cpuif_enable(); 39*91f16700Schasinglulu } 40*91f16700Schasinglulu 41*91f16700Schasinglulu void lmt_pwr_gic_off(void) 42*91f16700Schasinglulu { 43*91f16700Schasinglulu gicv2_cpuif_disable(); 44*91f16700Schasinglulu } 45