1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (C) 2024, Charleye <wangkart@aliyun.com> 4 * All rights reserved. 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 #include <lmt_def.h> 11 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <common/desc_image_load.h> 15 #include <drivers/console.h> 16 #include <drivers/generic_delay_timer.h> 17 #include <drivers/ti/uart/uart_16550.h> 18 #include <lib/mmio.h> 19 #include <plat/common/platform.h> 20 #include <plat/arm/common/plat_arm.h> 21 22 static entry_point_info_t bl32_image_ep_info; 23 static entry_point_info_t bl33_image_ep_info; 24 25 /* 26 * Table of regions to map using the MMU. 27 * This doesn't include TZRAM as the 'mem_layout' argument passed to 28 * configure_mmu_elx() will give the available subset of that, 29 */ 30 const mmap_region_t plat_lmt_mmap[] = { 31 MAP_REGION_FLAT(DEVICE0_BASE, DEVICE0_SIZE, MT_DEVICE | MT_RW | MT_NS), 32 MAP_REGION_FLAT(GICD_BASE, 0x8000, MT_DEVICE | MT_RW | MT_SECURE), 33 MAP_REGION_FLAT(LMT_PMU_BASE, 0x1000, MT_DEVICE | MT_RW | MT_SECURE), 34 { 0 } 35 }; 36 37 const mmap_region_t *plat_lmt_get_mmap(void) 38 { 39 return plat_lmt_mmap; 40 } 41 42 unsigned int plat_get_syscnt_freq2(void) 43 { 44 return LMT_OSC24M_CLK_IN_HZ; 45 } 46 47 /******************************************************************************* 48 * Return a pointer to the 'entry_point_info' structure of the next image for 49 * the security state specified. BL33 corresponds to the non-secure image type 50 * while BL32 corresponds to the secure image type. A NULL pointer is returned 51 * if the image does not exist. 52 ******************************************************************************/ 53 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 54 { 55 entry_point_info_t *next_image_info; 56 57 //assert(sec_state_is_valid(type)); 58 next_image_info = (type == NON_SECURE) ? \ 59 &bl33_image_ep_info : &bl32_image_ep_info; 60 61 /* None of the images on this platform can have 0x0 as the entrypoint */ 62 if (next_image_info->pc) 63 return next_image_info; 64 else 65 return NULL; 66 } 67 68 /* 69 * Set the build time defaults,if we can't find any config data. 70 */ 71 static inline void bl31_set_default_config(void) 72 { 73 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE; 74 bl32_image_ep_info.spsr = (uint32_t)arm_get_spsr_for_bl32_entry(); 75 bl33_image_ep_info.pc = (uintptr_t)plat_get_ns_image_entrypoint(); 76 bl33_image_ep_info.spsr = (uint32_t)SPSR_64(MODE_EL2, MODE_SP_ELX, 77 DISABLE_ALL_EXCEPTIONS); 78 } 79 80 static void lmt_print_platform_name(void) 81 { 82 NOTICE("ATF running on %s\n", PLATFORM_NAME); 83 } 84 85 void lmt_config_setup(void) 86 { 87 lmt_print_platform_name(); 88 89 generic_delay_timer_init(); 90 } 91 92 /******************************************************************************* 93 * Perform any BL3-1 early platform setup. Here is an opportunity to copy 94 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they 95 * are lost (potentially). This needs to be done before the MMU is initialized 96 * so that the memory layout can be used while creating page tables. 97 * BL2 has flushed this information to memory, so we are guaranteed to pick up 98 * good data. 99 ******************************************************************************/ 100 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 101 u_register_t arg2, u_register_t arg3) 102 { 103 lmt_console_init(); 104 105 /* Initialize the platform config for future decision making */ 106 lmt_config_setup(); 107 /* There are no parameters from BL2 if BL31 is a reset vector */ 108 assert(arg0 == 0U); 109 assert(arg1 == 0U); 110 111 /* 112 * Do initial security configuration to allow DRAM/device access. On 113 * Base Sigi only DRAM security is programmable (via TrustZone), but 114 * other platforms might have more programmable security devices 115 * present. 116 */ 117 118 /* Populate common information for BL32 and BL33 */ 119 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 120 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 121 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 122 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 123 124 bl31_set_default_config(); 125 126 VERBOSE("BL31: early platform setup\n"); 127 NOTICE("BL31: Secure code at 0x%08lx\n", bl32_image_ep_info.pc); 128 NOTICE("BL31: Non secure code at 0x%08lx\n", bl33_image_ep_info.pc); 129 } 130 131 /******************************************************************************* 132 * Perform any BL3-1 platform setup code 133 ******************************************************************************/ 134 void bl31_platform_setup(void) 135 { 136 /* Initialize the gic cpu and distributor interfaces */ 137 plat_lmt_gic_init(); 138 } 139 140 /******************************************************************************* 141 * Perform the very early platform specific architectural setup here. At the 142 * moment this is only intializes the mmu in a quick and dirty way. 143 ******************************************************************************/ 144 void bl31_plat_arch_setup(void) 145 { 146 const mmap_region_t bl_regions[] = { 147 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 148 MT_MEMORY | MT_RW | MT_SECURE), 149 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 150 MT_CODE | MT_SECURE), 151 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, MT_RO_DATA| MT_SECURE), 152 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_MEMORY | MT_RW | MT_SECURE), 153 {0} 154 }; 155 setup_page_tables(bl_regions, plat_lmt_get_mmap()); 156 enable_mmu_el3(0); 157 } 158