1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700SchasingluluCSS_USE_SCMI_SDS_DRIVER := 1 8*91f16700Schasinglulu 9*91f16700SchasingluluCSS_ENT_BASE := plat/arm/css/sgi 10*91f16700Schasinglulu 11*91f16700SchasingluluENABLE_FEAT_RAS := 1 12*91f16700Schasinglulu 13*91f16700SchasingluluSDEI_SUPPORT := 0 14*91f16700Schasinglulu 15*91f16700SchasingluluEL3_EXCEPTION_HANDLING := 0 16*91f16700Schasinglulu 17*91f16700SchasingluluHANDLE_EA_EL3_FIRST_NS := 0 18*91f16700Schasinglulu 19*91f16700SchasingluluCSS_SGI_CHIP_COUNT := 1 20*91f16700Schasinglulu 21*91f16700SchasingluluCSS_SGI_PLATFORM_VARIANT := 0 22*91f16700Schasinglulu 23*91f16700Schasinglulu# Do not enable SVE 24*91f16700SchasingluluENABLE_SVE_FOR_NS := 0 25*91f16700Schasinglulu 26*91f16700SchasingluluCTX_INCLUDE_FPREGS := 1 27*91f16700Schasinglulu 28*91f16700SchasingluluINTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c 29*91f16700Schasinglulu 30*91f16700SchasingluluPLAT_INCLUDES += -I${CSS_ENT_BASE}/include 31*91f16700Schasinglulu 32*91f16700Schasinglulu# GIC-600 configuration 33*91f16700SchasingluluGICV3_SUPPORT_GIC600 := 1 34*91f16700Schasinglulu 35*91f16700Schasinglulu# Include GICv3 driver files 36*91f16700Schasingluluinclude drivers/arm/gic/v3/gicv3.mk 37*91f16700Schasinglulu 38*91f16700SchasingluluENT_GIC_SOURCES := ${GICV3_SOURCES} \ 39*91f16700Schasinglulu plat/common/plat_gicv3.c \ 40*91f16700Schasinglulu plat/arm/common/arm_gicv3.c 41*91f16700Schasinglulu 42*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/aarch64/sgi_helper.S 43*91f16700Schasinglulu 44*91f16700SchasingluluBL1_SOURCES += ${INTERCONNECT_SOURCES} \ 45*91f16700Schasinglulu drivers/arm/sbsa/sbsa.c 46*91f16700Schasinglulu 47*91f16700SchasingluluBL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c \ 48*91f16700Schasinglulu drivers/arm/css/sds/sds.c 49*91f16700Schasinglulu 50*91f16700SchasingluluBL31_SOURCES += ${INTERCONNECT_SOURCES} \ 51*91f16700Schasinglulu ${ENT_GIC_SOURCES} \ 52*91f16700Schasinglulu ${CSS_ENT_BASE}/sgi_bl31_setup.c \ 53*91f16700Schasinglulu ${CSS_ENT_BASE}/sgi_topology.c 54*91f16700Schasinglulu 55*91f16700Schasingluluifneq (${RESET_TO_BL31},0) 56*91f16700Schasinglulu $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \ 57*91f16700Schasinglulu Please set RESET_TO_BL31 to 0.") 58*91f16700Schasingluluendif 59*91f16700Schasinglulu 60*91f16700Schasinglulu$(eval $(call add_define,SGI_PLAT)) 61*91f16700Schasinglulu 62*91f16700Schasinglulu$(eval $(call add_define,CSS_SGI_CHIP_COUNT)) 63*91f16700Schasinglulu 64*91f16700Schasinglulu$(eval $(call add_define,CSS_SGI_PLATFORM_VARIANT)) 65*91f16700Schasinglulu 66*91f16700Schasingluluoverride CSS_LOAD_SCP_IMAGES := 0 67*91f16700Schasingluluoverride NEED_BL2U := no 68*91f16700Schasingluluoverride ARM_PLAT_MT := 1 69*91f16700Schasingluluoverride PSCI_EXTENDED_STATE_ID := 1 70*91f16700Schasingluluoverride ARM_RECOM_STATE_ID_ENC := 1 71*91f16700Schasinglulu 72*91f16700Schasinglulu# System coherency is managed in hardware 73*91f16700SchasingluluHW_ASSISTED_COHERENCY := 1 74*91f16700Schasinglulu 75*91f16700Schasinglulu# When building for systems with hardware-assisted coherency, there's no need to 76*91f16700Schasinglulu# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 77*91f16700SchasingluluUSE_COHERENT_MEM := 0 78*91f16700Schasinglulu 79*91f16700Schasingluluinclude plat/arm/common/arm_common.mk 80*91f16700Schasingluluinclude plat/arm/css/common/css_common.mk 81*91f16700Schasingluluinclude plat/arm/soc/common/soc_css.mk 82*91f16700Schasingluluinclude plat/arm/board/common/board_common.mk 83