1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SGI_SOC_CSS_DEF_H 8*91f16700Schasinglulu #define SGI_SOC_CSS_DEF_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/utils_def.h> 11*91f16700Schasinglulu #include <plat/arm/board/common/v2m_def.h> 12*91f16700Schasinglulu #include <plat/arm/soc/common/soc_css_def.h> 13*91f16700Schasinglulu #include <plat/common/common_def.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu /* 16*91f16700Schasinglulu * Definitions common to all ARM CSSv1-based development platforms 17*91f16700Schasinglulu */ 18*91f16700Schasinglulu 19*91f16700Schasinglulu /* Platform ID address */ 20*91f16700Schasinglulu #define BOARD_CSS_PLAT_ID_REG_ADDR UL(0x7ffe00e0) 21*91f16700Schasinglulu 22*91f16700Schasinglulu /* Platform ID related accessors */ 23*91f16700Schasinglulu #define BOARD_CSS_PLAT_ID_REG_ID_MASK 0x0f 24*91f16700Schasinglulu #define BOARD_CSS_PLAT_ID_REG_ID_SHIFT 0x0 25*91f16700Schasinglulu #define BOARD_CSS_PLAT_TYPE_EMULATOR 0x02 26*91f16700Schasinglulu 27*91f16700Schasinglulu #ifndef __ASSEMBLER__ 28*91f16700Schasinglulu 29*91f16700Schasinglulu #include <lib/mmio.h> 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define BOARD_CSS_GET_PLAT_TYPE(addr) \ 32*91f16700Schasinglulu ((mmio_read_32(addr) & BOARD_CSS_PLAT_ID_REG_ID_MASK) \ 33*91f16700Schasinglulu >> BOARD_CSS_PLAT_ID_REG_ID_SHIFT) 34*91f16700Schasinglulu 35*91f16700Schasinglulu #endif /* __ASSEMBLER__ */ 36*91f16700Schasinglulu 37*91f16700Schasinglulu #define MAX_IO_DEVICES 3 38*91f16700Schasinglulu #define MAX_IO_HANDLES 4 39*91f16700Schasinglulu 40*91f16700Schasinglulu /* Reserve the last block of flash for PSCI MEM PROTECT flag */ 41*91f16700Schasinglulu #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE 42*91f16700Schasinglulu #define PLAT_ARM_FLASH_IMAGE_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) 43*91f16700Schasinglulu 44*91f16700Schasinglulu #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE 45*91f16700Schasinglulu #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) 46*91f16700Schasinglulu 47*91f16700Schasinglulu #endif /* SGI_SOC_CSS_DEF_H */ 48