xref: /arm-trusted-firmware/plat/arm/css/common/css_topology.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h>
10*91f16700Schasinglulu #include <plat/common/platform.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #if ARM_PLAT_MT
13*91f16700Schasinglulu #pragma weak plat_arm_get_cpu_pe_count
14*91f16700Schasinglulu #endif
15*91f16700Schasinglulu 
16*91f16700Schasinglulu /******************************************************************************
17*91f16700Schasinglulu  * This function implements a part of the critical interface between the psci
18*91f16700Schasinglulu  * generic layer and the platform that allows the former to query the platform
19*91f16700Schasinglulu  * to convert an MPIDR to a unique linear index. An error code (-1) is
20*91f16700Schasinglulu  * returned in case the MPIDR is invalid.
21*91f16700Schasinglulu  *****************************************************************************/
22*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr)
23*91f16700Schasinglulu {
24*91f16700Schasinglulu 	if (arm_check_mpidr(mpidr) == 0) {
25*91f16700Schasinglulu #if ARM_PLAT_MT
26*91f16700Schasinglulu 		assert((read_mpidr_el1() & MPIDR_MT_MASK) != 0);
27*91f16700Schasinglulu 
28*91f16700Schasinglulu 		/*
29*91f16700Schasinglulu 		 * The DTB files don't provide the MT bit in the mpidr argument
30*91f16700Schasinglulu 		 * so set it manually before calculating core position
31*91f16700Schasinglulu 		 */
32*91f16700Schasinglulu 		mpidr |= MPIDR_MT_MASK;
33*91f16700Schasinglulu #endif
34*91f16700Schasinglulu 		return plat_arm_calc_core_pos(mpidr);
35*91f16700Schasinglulu 	}
36*91f16700Schasinglulu 	return -1;
37*91f16700Schasinglulu }
38*91f16700Schasinglulu 
39*91f16700Schasinglulu #if ARM_PLAT_MT
40*91f16700Schasinglulu /******************************************************************************
41*91f16700Schasinglulu  * This function returns the PE count within the physical cpu corresponding to
42*91f16700Schasinglulu  * `mpidr`. Now one cpu only have one thread, so just return 1.
43*91f16700Schasinglulu  *****************************************************************************/
44*91f16700Schasinglulu unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
45*91f16700Schasinglulu {
46*91f16700Schasinglulu 	return 1;
47*91f16700Schasinglulu }
48*91f16700Schasinglulu #endif /* ARM_PLAT_MT */
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