xref: /arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <string.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <common/bl_common.h>
10*91f16700Schasinglulu #include <common/debug.h>
11*91f16700Schasinglulu #include <drivers/arm/css/css_scp.h>
12*91f16700Schasinglulu #include <lib/mmio.h>
13*91f16700Schasinglulu #include <lib/utils.h>
14*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h>
15*91f16700Schasinglulu #include <platform_def.h>
16*91f16700Schasinglulu 
17*91f16700Schasinglulu /* Weak definition may be overridden in specific CSS based platform */
18*91f16700Schasinglulu #pragma weak plat_arm_bl2_handle_scp_bl2
19*91f16700Schasinglulu 
20*91f16700Schasinglulu /*******************************************************************************
21*91f16700Schasinglulu  * Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol.
22*91f16700Schasinglulu  * Return 0 on success, -1 otherwise.
23*91f16700Schasinglulu  ******************************************************************************/
24*91f16700Schasinglulu int plat_arm_bl2_handle_scp_bl2(image_info_t *scp_bl2_image_info)
25*91f16700Schasinglulu {
26*91f16700Schasinglulu 	int ret;
27*91f16700Schasinglulu 
28*91f16700Schasinglulu 	INFO("BL2: Initiating SCP_BL2 transfer to SCP\n");
29*91f16700Schasinglulu 
30*91f16700Schasinglulu 	ret = css_scp_boot_image_xfer((void *)scp_bl2_image_info->image_base,
31*91f16700Schasinglulu 		scp_bl2_image_info->image_size);
32*91f16700Schasinglulu 
33*91f16700Schasinglulu 	if (ret == 0)
34*91f16700Schasinglulu 		ret = css_scp_boot_ready();
35*91f16700Schasinglulu 
36*91f16700Schasinglulu 	if (ret == 0)
37*91f16700Schasinglulu 		INFO("BL2: SCP_BL2 transferred to SCP\n");
38*91f16700Schasinglulu 	else
39*91f16700Schasinglulu 		ERROR("BL2: SCP_BL2 transfer failure\n");
40*91f16700Schasinglulu 
41*91f16700Schasinglulu 	return ret;
42*91f16700Schasinglulu }
43*91f16700Schasinglulu 
44*91f16700Schasinglulu #if !CSS_USE_SCMI_SDS_DRIVER
45*91f16700Schasinglulu # if defined(EL3_PAYLOAD_BASE) || JUNO_AARCH32_EL3_RUNTIME
46*91f16700Schasinglulu 
47*91f16700Schasinglulu /*
48*91f16700Schasinglulu  * We need to override some of the platform functions when booting an EL3
49*91f16700Schasinglulu  * payload or SP_MIN on Juno AArch32. This needs to be done only for
50*91f16700Schasinglulu  * SCPI/BOM SCP systems as in case of SDS, the structures remain in memory and
51*91f16700Schasinglulu  * don't need to be overwritten.
52*91f16700Schasinglulu  */
53*91f16700Schasinglulu 
54*91f16700Schasinglulu static unsigned int scp_boot_config;
55*91f16700Schasinglulu 
56*91f16700Schasinglulu void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1,
57*91f16700Schasinglulu 			u_register_t arg2, u_register_t arg3)
58*91f16700Schasinglulu {
59*91f16700Schasinglulu 	arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
60*91f16700Schasinglulu 
61*91f16700Schasinglulu 	/* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */
62*91f16700Schasinglulu 	scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR);
63*91f16700Schasinglulu 	VERBOSE("BL2: Saved SCP Boot config = 0x%x\n", scp_boot_config);
64*91f16700Schasinglulu }
65*91f16700Schasinglulu 
66*91f16700Schasinglulu void bl2_platform_setup(void)
67*91f16700Schasinglulu {
68*91f16700Schasinglulu 	arm_bl2_platform_setup();
69*91f16700Schasinglulu 
70*91f16700Schasinglulu 	/*
71*91f16700Schasinglulu 	 * Before releasing the AP cores out of reset, the SCP writes some data
72*91f16700Schasinglulu 	 * at the beginning of the Trusted SRAM. It is is overwritten before
73*91f16700Schasinglulu 	 * reaching this function. We need to restore this data, as if the
74*91f16700Schasinglulu 	 * target had just come out of reset. This implies:
75*91f16700Schasinglulu 	 *  - zeroing the first 128 bytes of Trusted SRAM using zeromem instead
76*91f16700Schasinglulu 	 *    of zero_normalmem since this is device memory.
77*91f16700Schasinglulu 	 *  - restoring the SCP boot configuration.
78*91f16700Schasinglulu 	 */
79*91f16700Schasinglulu 	VERBOSE("BL2: Restoring SCP reset data in Trusted SRAM\n");
80*91f16700Schasinglulu 	zeromem((void *) ARM_SHARED_RAM_BASE, 128);
81*91f16700Schasinglulu 	mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config);
82*91f16700Schasinglulu }
83*91f16700Schasinglulu 
84*91f16700Schasinglulu # endif /* EL3_PAYLOAD_BASE */
85*91f16700Schasinglulu 
86*91f16700Schasinglulu #endif /* CSS_USE_SCMI_SDS_DRIVER */
87*91f16700Schasinglulu 
88*91f16700Schasinglulu int bl2_plat_handle_post_image_load(unsigned int image_id)
89*91f16700Schasinglulu {
90*91f16700Schasinglulu 	return arm_bl2_plat_handle_post_image_load(image_id);
91*91f16700Schasinglulu }
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