1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <bl32/tsp/platform_tsp.h> 12*91f16700Schasinglulu #include <common/bl_common.h> 13*91f16700Schasinglulu #include <common/debug.h> 14*91f16700Schasinglulu #include <drivers/arm/pl011.h> 15*91f16700Schasinglulu #include <drivers/console.h> 16*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* Weak definitions may be overridden in specific ARM standard platform */ 19*91f16700Schasinglulu #pragma weak tsp_early_platform_setup 20*91f16700Schasinglulu #pragma weak tsp_platform_setup 21*91f16700Schasinglulu #pragma weak tsp_plat_arch_setup 22*91f16700Schasinglulu 23*91f16700Schasinglulu #define MAP_BL_TSP_TOTAL MAP_REGION_FLAT( \ 24*91f16700Schasinglulu BL32_BASE, \ 25*91f16700Schasinglulu BL32_END - BL32_BASE, \ 26*91f16700Schasinglulu MT_MEMORY | MT_RW | MT_SECURE) 27*91f16700Schasinglulu 28*91f16700Schasinglulu /******************************************************************************* 29*91f16700Schasinglulu * Initialize the UART 30*91f16700Schasinglulu ******************************************************************************/ 31*91f16700Schasinglulu static console_t arm_tsp_runtime_console; 32*91f16700Schasinglulu 33*91f16700Schasinglulu void arm_tsp_early_platform_setup(void) 34*91f16700Schasinglulu { 35*91f16700Schasinglulu /* 36*91f16700Schasinglulu * Initialize a different console than already in use to display 37*91f16700Schasinglulu * messages from TSP 38*91f16700Schasinglulu */ 39*91f16700Schasinglulu int rc = console_pl011_register(PLAT_ARM_TSP_UART_BASE, 40*91f16700Schasinglulu PLAT_ARM_TSP_UART_CLK_IN_HZ, 41*91f16700Schasinglulu ARM_CONSOLE_BAUDRATE, 42*91f16700Schasinglulu &arm_tsp_runtime_console); 43*91f16700Schasinglulu if (rc == 0) 44*91f16700Schasinglulu panic(); 45*91f16700Schasinglulu 46*91f16700Schasinglulu console_set_scope(&arm_tsp_runtime_console, 47*91f16700Schasinglulu CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME); 48*91f16700Schasinglulu } 49*91f16700Schasinglulu 50*91f16700Schasinglulu void tsp_early_platform_setup(void) 51*91f16700Schasinglulu { 52*91f16700Schasinglulu arm_tsp_early_platform_setup(); 53*91f16700Schasinglulu } 54*91f16700Schasinglulu 55*91f16700Schasinglulu /******************************************************************************* 56*91f16700Schasinglulu * Perform platform specific setup placeholder 57*91f16700Schasinglulu ******************************************************************************/ 58*91f16700Schasinglulu void tsp_platform_setup(void) 59*91f16700Schasinglulu { 60*91f16700Schasinglulu plat_arm_gic_driver_init(); 61*91f16700Schasinglulu } 62*91f16700Schasinglulu 63*91f16700Schasinglulu /******************************************************************************* 64*91f16700Schasinglulu * Perform the very early platform specific architectural setup here. At the 65*91f16700Schasinglulu * moment this is only initializes the MMU 66*91f16700Schasinglulu ******************************************************************************/ 67*91f16700Schasinglulu void tsp_plat_arch_setup(void) 68*91f16700Schasinglulu { 69*91f16700Schasinglulu #if USE_COHERENT_MEM 70*91f16700Schasinglulu /* Ensure ARM platforms don't use coherent memory in TSP */ 71*91f16700Schasinglulu assert((BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE) == 0U); 72*91f16700Schasinglulu #endif 73*91f16700Schasinglulu 74*91f16700Schasinglulu const mmap_region_t bl_regions[] = { 75*91f16700Schasinglulu MAP_BL_TSP_TOTAL, 76*91f16700Schasinglulu ARM_MAP_BL_RO, 77*91f16700Schasinglulu {0} 78*91f16700Schasinglulu }; 79*91f16700Schasinglulu 80*91f16700Schasinglulu setup_page_tables(bl_regions, plat_arm_get_mmap()); 81*91f16700Schasinglulu enable_mmu_el1(0); 82*91f16700Schasinglulu 83*91f16700Schasinglulu #if PLAT_RO_XLAT_TABLES 84*91f16700Schasinglulu arm_xlat_make_tables_readonly(); 85*91f16700Schasinglulu #endif 86*91f16700Schasinglulu } 87