1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <common/debug.h> 12*91f16700Schasinglulu #include <drivers/arm/tzc_dmc500.h> 13*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu /******************************************************************************* 16*91f16700Schasinglulu * Initialize the DMC500-TrustZone Controller for ARM standard platforms. 17*91f16700Schasinglulu * When booting an EL3 payload, this is simplified: we configure region 0 with 18*91f16700Schasinglulu * secure access only and do not enable any other region. 19*91f16700Schasinglulu ******************************************************************************/ 20*91f16700Schasinglulu void arm_tzc_dmc500_setup(tzc_dmc500_driver_data_t *plat_driver_data, 21*91f16700Schasinglulu const arm_tzc_regions_info_t *tzc_regions) 22*91f16700Schasinglulu { 23*91f16700Schasinglulu #ifndef EL3_PAYLOAD_BASE 24*91f16700Schasinglulu unsigned int region_index = 1U; 25*91f16700Schasinglulu const arm_tzc_regions_info_t *p; 26*91f16700Schasinglulu const arm_tzc_regions_info_t init_tzc_regions[] = { 27*91f16700Schasinglulu ARM_TZC_REGIONS_DEF, 28*91f16700Schasinglulu {0} 29*91f16700Schasinglulu }; 30*91f16700Schasinglulu #endif 31*91f16700Schasinglulu 32*91f16700Schasinglulu assert(plat_driver_data); 33*91f16700Schasinglulu 34*91f16700Schasinglulu INFO("Configuring DMC-500 TZ Settings\n"); 35*91f16700Schasinglulu 36*91f16700Schasinglulu tzc_dmc500_driver_init(plat_driver_data); 37*91f16700Schasinglulu 38*91f16700Schasinglulu #ifndef EL3_PAYLOAD_BASE 39*91f16700Schasinglulu if (tzc_regions == NULL) 40*91f16700Schasinglulu p = init_tzc_regions; 41*91f16700Schasinglulu else 42*91f16700Schasinglulu p = tzc_regions; 43*91f16700Schasinglulu 44*91f16700Schasinglulu /* Region 0 set to no access by default */ 45*91f16700Schasinglulu tzc_dmc500_configure_region0(TZC_REGION_S_NONE, 0); 46*91f16700Schasinglulu 47*91f16700Schasinglulu /* Rest Regions set according to tzc_regions array */ 48*91f16700Schasinglulu for (; p->base != 0ULL; p++) { 49*91f16700Schasinglulu tzc_dmc500_configure_region(region_index, p->base, p->end, 50*91f16700Schasinglulu p->sec_attr, p->nsaid_permissions); 51*91f16700Schasinglulu region_index++; 52*91f16700Schasinglulu } 53*91f16700Schasinglulu 54*91f16700Schasinglulu INFO("Total %u regions set.\n", region_index); 55*91f16700Schasinglulu 56*91f16700Schasinglulu #else 57*91f16700Schasinglulu /* Allow secure access only to DRAM for EL3 payloads */ 58*91f16700Schasinglulu tzc_dmc500_configure_region0(TZC_REGION_S_RDWR, 0); 59*91f16700Schasinglulu #endif 60*91f16700Schasinglulu /* 61*91f16700Schasinglulu * Raise an exception if a NS device tries to access secure memory 62*91f16700Schasinglulu * TODO: Add interrupt handling support. 63*91f16700Schasinglulu */ 64*91f16700Schasinglulu tzc_dmc500_set_action(TZC_ACTION_RV_LOWERR); 65*91f16700Schasinglulu 66*91f16700Schasinglulu /* 67*91f16700Schasinglulu * Flush the configuration settings to have an affect. Validate 68*91f16700Schasinglulu * flush by checking FILTER_EN is set on region 1 attributes 69*91f16700Schasinglulu * register. 70*91f16700Schasinglulu */ 71*91f16700Schasinglulu tzc_dmc500_config_complete(); 72*91f16700Schasinglulu 73*91f16700Schasinglulu /* 74*91f16700Schasinglulu * Wait for the flush to complete. 75*91f16700Schasinglulu * TODO: Have a timeout for this loop 76*91f16700Schasinglulu */ 77*91f16700Schasinglulu while (tzc_dmc500_verify_complete()) 78*91f16700Schasinglulu ; 79*91f16700Schasinglulu } 80