1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <arch.h> 10*91f16700Schasinglulu #include <drivers/arm/ccn.h> 11*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu static const unsigned char master_to_rn_id_map[] = { 14*91f16700Schasinglulu PLAT_ARM_CLUSTER_TO_CCN_ID_MAP 15*91f16700Schasinglulu }; 16*91f16700Schasinglulu 17*91f16700Schasinglulu static const ccn_desc_t arm_ccn_desc = { 18*91f16700Schasinglulu .periphbase = PLAT_ARM_CCN_BASE, 19*91f16700Schasinglulu .num_masters = ARRAY_SIZE(master_to_rn_id_map), 20*91f16700Schasinglulu .master_to_rn_id_map = master_to_rn_id_map 21*91f16700Schasinglulu }; 22*91f16700Schasinglulu 23*91f16700Schasinglulu CASSERT(PLAT_ARM_CLUSTER_COUNT == ARRAY_SIZE(master_to_rn_id_map), 24*91f16700Schasinglulu assert_invalid_cluster_count_for_ccn_variant); 25*91f16700Schasinglulu 26*91f16700Schasinglulu /****************************************************************************** 27*91f16700Schasinglulu * The following functions are defined as weak to allow a platform to override 28*91f16700Schasinglulu * the way ARM CCN driver is initialised and used. 29*91f16700Schasinglulu *****************************************************************************/ 30*91f16700Schasinglulu #pragma weak plat_arm_interconnect_init 31*91f16700Schasinglulu #pragma weak plat_arm_interconnect_enter_coherency 32*91f16700Schasinglulu #pragma weak plat_arm_interconnect_exit_coherency 33*91f16700Schasinglulu 34*91f16700Schasinglulu 35*91f16700Schasinglulu /****************************************************************************** 36*91f16700Schasinglulu * Helper function to initialize ARM CCN driver. 37*91f16700Schasinglulu *****************************************************************************/ 38*91f16700Schasinglulu void __init plat_arm_interconnect_init(void) 39*91f16700Schasinglulu { 40*91f16700Schasinglulu ccn_init(&arm_ccn_desc); 41*91f16700Schasinglulu } 42*91f16700Schasinglulu 43*91f16700Schasinglulu /****************************************************************************** 44*91f16700Schasinglulu * Helper function to place current master into coherency 45*91f16700Schasinglulu *****************************************************************************/ 46*91f16700Schasinglulu void plat_arm_interconnect_enter_coherency(void) 47*91f16700Schasinglulu { 48*91f16700Schasinglulu ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 49*91f16700Schasinglulu } 50*91f16700Schasinglulu 51*91f16700Schasinglulu /****************************************************************************** 52*91f16700Schasinglulu * Helper function to remove current master from coherency 53*91f16700Schasinglulu *****************************************************************************/ 54*91f16700Schasinglulu void plat_arm_interconnect_exit_coherency(void) 55*91f16700Schasinglulu { 56*91f16700Schasinglulu ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 57*91f16700Schasinglulu } 58