1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/bl_common.h> 10*91f16700Schasinglulu #include <common/desc_image_load.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /******************************************************************************* 13*91f16700Schasinglulu * Following descriptor provides BL image/ep information that gets used 14*91f16700Schasinglulu * by BL2 to load the images and also subset of this information is 15*91f16700Schasinglulu * passed to next BL image. The image loading sequence is managed by 16*91f16700Schasinglulu * populating the images in required loading order. The image execution 17*91f16700Schasinglulu * sequence is managed by populating the `next_handoff_image_id` with 18*91f16700Schasinglulu * the next executable image id. 19*91f16700Schasinglulu ******************************************************************************/ 20*91f16700Schasinglulu static bl_mem_params_node_t bl2_mem_params_descs[] = { 21*91f16700Schasinglulu #ifdef SCP_BL2_BASE 22*91f16700Schasinglulu /* Fill SCP_BL2 related information if it exists */ 23*91f16700Schasinglulu { 24*91f16700Schasinglulu .image_id = SCP_BL2_IMAGE_ID, 25*91f16700Schasinglulu 26*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, 27*91f16700Schasinglulu VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), 28*91f16700Schasinglulu 29*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY, 30*91f16700Schasinglulu VERSION_2, image_info_t, 0), 31*91f16700Schasinglulu .image_info.image_base = SCP_BL2_BASE, 32*91f16700Schasinglulu .image_info.image_max_size = PLAT_CSS_MAX_SCP_BL2_SIZE, 33*91f16700Schasinglulu 34*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 35*91f16700Schasinglulu }, 36*91f16700Schasinglulu #endif /* SCP_BL2_BASE */ 37*91f16700Schasinglulu 38*91f16700Schasinglulu /* Fill BL32 related information */ 39*91f16700Schasinglulu { 40*91f16700Schasinglulu .image_id = BL32_IMAGE_ID, 41*91f16700Schasinglulu 42*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 43*91f16700Schasinglulu VERSION_2, entry_point_info_t, 44*91f16700Schasinglulu SECURE | EXECUTABLE | EP_FIRST_EXE), 45*91f16700Schasinglulu .ep_info.pc = BL32_BASE, 46*91f16700Schasinglulu .ep_info.spsr = SPSR_MODE32(MODE32_mon, SPSR_T_ARM, 47*91f16700Schasinglulu SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS), 48*91f16700Schasinglulu 49*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 50*91f16700Schasinglulu VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP), 51*91f16700Schasinglulu .image_info.image_base = BL32_BASE, 52*91f16700Schasinglulu .image_info.image_max_size = BL32_LIMIT - BL32_BASE, 53*91f16700Schasinglulu 54*91f16700Schasinglulu .next_handoff_image_id = BL33_IMAGE_ID, 55*91f16700Schasinglulu }, 56*91f16700Schasinglulu /* Fill HW_CONFIG related information if it exists */ 57*91f16700Schasinglulu { 58*91f16700Schasinglulu .image_id = HW_CONFIG_ID, 59*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, 60*91f16700Schasinglulu VERSION_2, entry_point_info_t, 61*91f16700Schasinglulu NON_SECURE | NON_EXECUTABLE), 62*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY, 63*91f16700Schasinglulu VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING), 64*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 65*91f16700Schasinglulu }, 66*91f16700Schasinglulu /* Fill BL33 related information */ 67*91f16700Schasinglulu { 68*91f16700Schasinglulu .image_id = BL33_IMAGE_ID, 69*91f16700Schasinglulu 70*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 71*91f16700Schasinglulu VERSION_2, entry_point_info_t, NON_SECURE | EXECUTABLE), 72*91f16700Schasinglulu #ifdef PRELOADED_BL33_BASE 73*91f16700Schasinglulu .ep_info.pc = PRELOADED_BL33_BASE, 74*91f16700Schasinglulu 75*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 76*91f16700Schasinglulu VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING), 77*91f16700Schasinglulu #else 78*91f16700Schasinglulu .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE, 79*91f16700Schasinglulu 80*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 81*91f16700Schasinglulu VERSION_2, image_info_t, 0), 82*91f16700Schasinglulu .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE, 83*91f16700Schasinglulu .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE 84*91f16700Schasinglulu - PLAT_ARM_NS_IMAGE_BASE, 85*91f16700Schasinglulu #endif /* PRELOADED_BL33_BASE */ 86*91f16700Schasinglulu 87*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 88*91f16700Schasinglulu } 89*91f16700Schasinglulu }; 90*91f16700Schasinglulu 91*91f16700Schasinglulu REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs) 92