1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <plat/arm/common/plat_arm.h> 9 #include <plat/arm/css/common/css_pm.h> 10 #include <sgi_variant.h> 11 12 /****************************************************************************** 13 * The power domain tree descriptor. 14 ******************************************************************************/ 15 const unsigned char rd_v1_mc_pd_tree_desc_multi_chip[] = { 16 ((PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT)), 17 CSS_SGI_MAX_CPUS_PER_CLUSTER, 18 CSS_SGI_MAX_CPUS_PER_CLUSTER, 19 CSS_SGI_MAX_CPUS_PER_CLUSTER, 20 CSS_SGI_MAX_CPUS_PER_CLUSTER, 21 #if (CSS_SGI_CHIP_COUNT > 1) 22 CSS_SGI_MAX_CPUS_PER_CLUSTER, 23 CSS_SGI_MAX_CPUS_PER_CLUSTER, 24 CSS_SGI_MAX_CPUS_PER_CLUSTER, 25 CSS_SGI_MAX_CPUS_PER_CLUSTER, 26 #endif 27 #if (CSS_SGI_CHIP_COUNT > 2) 28 CSS_SGI_MAX_CPUS_PER_CLUSTER, 29 CSS_SGI_MAX_CPUS_PER_CLUSTER, 30 CSS_SGI_MAX_CPUS_PER_CLUSTER, 31 CSS_SGI_MAX_CPUS_PER_CLUSTER, 32 #endif 33 #if (CSS_SGI_CHIP_COUNT > 3) 34 CSS_SGI_MAX_CPUS_PER_CLUSTER, 35 CSS_SGI_MAX_CPUS_PER_CLUSTER, 36 CSS_SGI_MAX_CPUS_PER_CLUSTER, 37 CSS_SGI_MAX_CPUS_PER_CLUSTER 38 #endif 39 }; 40 41 /******************************************************************************* 42 * This function returns the topology tree information. 43 ******************************************************************************/ 44 const unsigned char *plat_get_power_domain_tree_desc(void) 45 { 46 if (plat_arm_sgi_get_multi_chip_mode() == 1) 47 return rd_v1_mc_pd_tree_desc_multi_chip; 48 panic(); 49 } 50 51 /******************************************************************************* 52 * The array mapping platform core position (implemented by plat_my_core_pos()) 53 * to the SCMI power domain ID implemented by SCP. 54 ******************************************************************************/ 55 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = { 56 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)), 57 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)), 58 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)), 59 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)), 60 #if (CSS_SGI_CHIP_COUNT > 1) 61 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x0)), 62 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x1)), 63 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x2)), 64 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x3)), 65 #endif 66 #if (CSS_SGI_CHIP_COUNT > 2) 67 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x0)), 68 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x1)), 69 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x2)), 70 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x3)), 71 #endif 72 #if (CSS_SGI_CHIP_COUNT > 3) 73 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x0)), 74 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x1)), 75 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x2)), 76 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x3)) 77 #endif 78 }; 79