1*91f16700Schasinglulu# Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved. 2*91f16700Schasinglulu# 3*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 4*91f16700Schasinglulu# 5*91f16700Schasinglulu 6*91f16700SchasingluluRD_N2_VARIANTS := 0 1 2 3 7*91f16700Schasingluluifneq ($(CSS_SGI_PLATFORM_VARIANT),\ 8*91f16700Schasinglulu $(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS))) 9*91f16700Schasinglulu $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, 1, 2 or 3, currently \ 10*91f16700Schasinglulu set to ${CSS_SGI_PLATFORM_VARIANT}.") 11*91f16700Schasingluluendif 12*91f16700Schasinglulu 13*91f16700Schasinglulu$(eval $(call CREATE_SEQ,SEQ,4)) 14*91f16700Schasingluluifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ))) 15*91f16700Schasinglulu $(error "Chip count for RD-N2-MC should be either $(SEQ) \ 16*91f16700Schasinglulu currently it is set to ${CSS_SGI_CHIP_COUNT}.") 17*91f16700Schasingluluendif 18*91f16700Schasinglulu 19*91f16700Schasinglulu# RD-N2 platform uses GIC-700 which is based on GICv4.1 20*91f16700SchasingluluGIC_ENABLE_V4_EXTN := 1 21*91f16700SchasingluluGIC_EXT_INTID := 1 22*91f16700Schasinglulu 23*91f16700Schasinglulu#Enable GIC Multichip Extension only for Multichip Platforms 24*91f16700Schasingluluifeq (${CSS_SGI_PLATFORM_VARIANT}, 2) 25*91f16700SchasingluluGICV3_IMPL_GIC600_MULTICHIP := 1 26*91f16700Schasingluluendif 27*91f16700Schasinglulu 28*91f16700Schasingluluoverride CSS_SYSTEM_GRACEFUL_RESET := 1 29*91f16700Schasingluluoverride EL3_EXCEPTION_HANDLING := 1 30*91f16700Schasinglulu 31*91f16700Schasingluluinclude plat/arm/css/sgi/sgi-common.mk 32*91f16700Schasinglulu 33*91f16700SchasingluluRDN2_BASE = plat/arm/board/rdn2 34*91f16700Schasinglulu 35*91f16700SchasingluluPLAT_INCLUDES += -I${RDN2_BASE}/include/ 36*91f16700Schasinglulu 37*91f16700SchasingluluSGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n2.S \ 38*91f16700Schasinglulu lib/cpus/aarch64/neoverse_v2.S 39*91f16700Schasinglulu 40*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat_v2.c 41*91f16700Schasinglulu 42*91f16700SchasingluluBL1_SOURCES += ${SGI_CPU_SOURCES} \ 43*91f16700Schasinglulu ${RDN2_BASE}/rdn2_err.c 44*91f16700Schasinglulu 45*91f16700SchasingluluBL2_SOURCES += ${RDN2_BASE}/rdn2_plat.c \ 46*91f16700Schasinglulu ${RDN2_BASE}/rdn2_security.c \ 47*91f16700Schasinglulu ${RDN2_BASE}/rdn2_err.c \ 48*91f16700Schasinglulu lib/utils/mem_region.c \ 49*91f16700Schasinglulu drivers/arm/tzc/tzc400.c \ 50*91f16700Schasinglulu plat/arm/common/arm_tzc400.c \ 51*91f16700Schasinglulu plat/arm/common/arm_nor_psci_mem_protect.c 52*91f16700Schasinglulu 53*91f16700SchasingluluBL31_SOURCES += ${SGI_CPU_SOURCES} \ 54*91f16700Schasinglulu ${RDN2_BASE}/rdn2_plat.c \ 55*91f16700Schasinglulu ${RDN2_BASE}/rdn2_topology.c \ 56*91f16700Schasinglulu drivers/cfi/v2m/v2m_flash.c \ 57*91f16700Schasinglulu lib/utils/mem_region.c \ 58*91f16700Schasinglulu plat/arm/common/arm_nor_psci_mem_protect.c 59*91f16700Schasinglulu 60*91f16700Schasingluluifeq (${TRUSTED_BOARD_BOOT}, 1) 61*91f16700SchasingluluBL1_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c 62*91f16700SchasingluluBL2_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c 63*91f16700Schasingluluendif 64*91f16700Schasinglulu 65*91f16700Schasingluluifeq (${CSS_SGI_PLATFORM_VARIANT}, 2) 66*91f16700SchasingluluBL31_SOURCES += drivers/arm/gic/v3/gic600_multichip.c 67*91f16700Schasinglulu 68*91f16700Schasinglulu# Enable dynamic addition of MMAP regions in BL31 69*91f16700SchasingluluBL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 70*91f16700Schasingluluendif 71*91f16700Schasinglulu 72*91f16700Schasingluluifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1) 73*91f16700SchasingluluBL31_SOURCES += ${RDN2_BASE}/rdn2_ras.c \ 74*91f16700Schasinglulu ${CSS_ENT_BASE}/ras/sgi_ras_common.c \ 75*91f16700Schasinglulu ${CSS_ENT_BASE}/ras/sgi_ras_sram.c \ 76*91f16700Schasinglulu ${CSS_ENT_BASE}/ras/sgi_ras_cpu.c 77*91f16700Schasingluluendif 78*91f16700Schasinglulu 79*91f16700Schasinglulu# Add the FDT_SOURCES and options for Dynamic Config 80*91f16700SchasingluluFDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_fw_config.dts \ 81*91f16700Schasinglulu ${RDN2_BASE}/fdts/${PLAT}_tb_fw_config.dts 82*91f16700SchasingluluFW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 83*91f16700SchasingluluTB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 84*91f16700Schasinglulu 85*91f16700Schasinglulu# Add the FW_CONFIG to FIP and specify the same to certtool 86*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 87*91f16700Schasinglulu# Add the TB_FW_CONFIG to FIP and specify the same to certtool 88*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 89*91f16700Schasinglulu 90*91f16700SchasingluluFDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_nt_fw_config.dts 91*91f16700SchasingluluNT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 92*91f16700Schasinglulu 93*91f16700Schasinglulu# Add the NT_FW_CONFIG to FIP and specify the same to certtool 94*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config)) 95*91f16700Schasinglulu 96*91f16700Schasingluluoverride CTX_INCLUDE_AARCH32_REGS := 0 97*91f16700Schasingluluoverride ENABLE_FEAT_AMU := 1 98