xref: /arm-trusted-firmware/plat/arm/board/rde1edge/rde1edge_plat.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <plat/common/platform.h>
8*91f16700Schasinglulu #include <sgi_plat.h>
9*91f16700Schasinglulu 
10*91f16700Schasinglulu unsigned int plat_arm_sgi_get_platform_id(void)
11*91f16700Schasinglulu {
12*91f16700Schasinglulu 	return mmio_read_32(SID_REG_BASE + SID_SYSTEM_ID_OFFSET)
13*91f16700Schasinglulu 				& SID_SYSTEM_ID_PART_NUM_MASK;
14*91f16700Schasinglulu }
15*91f16700Schasinglulu 
16*91f16700Schasinglulu unsigned int plat_arm_sgi_get_config_id(void)
17*91f16700Schasinglulu {
18*91f16700Schasinglulu 	return mmio_read_32(SID_REG_BASE + SID_SYSTEM_CFG_OFFSET);
19*91f16700Schasinglulu }
20*91f16700Schasinglulu 
21*91f16700Schasinglulu unsigned int plat_arm_sgi_get_multi_chip_mode(void)
22*91f16700Schasinglulu {
23*91f16700Schasinglulu 	return 0;
24*91f16700Schasinglulu }
25*91f16700Schasinglulu 
26*91f16700Schasinglulu void bl31_platform_setup(void)
27*91f16700Schasinglulu {
28*91f16700Schasinglulu 	sgi_bl31_common_platform_setup();
29*91f16700Schasinglulu }
30