1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020-2023, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <drivers/arm/css/css_mhu_doorbell.h> 8*91f16700Schasinglulu #include <drivers/arm/css/scmi.h> 9*91f16700Schasinglulu #include <drivers/arm/css/sds.h> 10*91f16700Schasinglulu #include <lib/smccc.h> 11*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 12*91f16700Schasinglulu #include <services/arm_arch_svc.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #include "morello_def.h" 15*91f16700Schasinglulu #include "morello_private.h" 16*91f16700Schasinglulu #include <platform_def.h> 17*91f16700Schasinglulu 18*91f16700Schasinglulu #ifdef TARGET_PLATFORM_SOC 19*91f16700Schasinglulu struct morello_plat_info plat_info; 20*91f16700Schasinglulu #endif 21*91f16700Schasinglulu 22*91f16700Schasinglulu static scmi_channel_plat_info_t morello_scmi_plat_info = { 23*91f16700Schasinglulu .scmi_mbx_mem = MORELLO_SCMI_PAYLOAD_BASE, 24*91f16700Schasinglulu .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, 25*91f16700Schasinglulu .db_preserve_mask = 0xfffffffe, 26*91f16700Schasinglulu .db_modify_mask = 0x1, 27*91f16700Schasinglulu .ring_doorbell = &mhu_ring_doorbell 28*91f16700Schasinglulu }; 29*91f16700Schasinglulu 30*91f16700Schasinglulu scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id) 31*91f16700Schasinglulu { 32*91f16700Schasinglulu return &morello_scmi_plat_info; 33*91f16700Schasinglulu } 34*91f16700Schasinglulu 35*91f16700Schasinglulu const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops) 36*91f16700Schasinglulu { 37*91f16700Schasinglulu ops->pwr_domain_off = morello_pwr_domain_off; 38*91f16700Schasinglulu return css_scmi_override_pm_ops(ops); 39*91f16700Schasinglulu } 40*91f16700Schasinglulu 41*91f16700Schasinglulu void bl31_platform_setup(void) 42*91f16700Schasinglulu { 43*91f16700Schasinglulu #ifdef TARGET_PLATFORM_SOC 44*91f16700Schasinglulu int ret; 45*91f16700Schasinglulu 46*91f16700Schasinglulu ret = sds_init(); 47*91f16700Schasinglulu if (ret != SDS_OK) { 48*91f16700Schasinglulu ERROR("SDS initialization failed. ret:%d\n", ret); 49*91f16700Schasinglulu panic(); 50*91f16700Schasinglulu } 51*91f16700Schasinglulu 52*91f16700Schasinglulu ret = sds_struct_read(MORELLO_SDS_PLATFORM_INFO_STRUCT_ID, 53*91f16700Schasinglulu MORELLO_SDS_PLATFORM_INFO_OFFSET, 54*91f16700Schasinglulu &plat_info, 55*91f16700Schasinglulu MORELLO_SDS_PLATFORM_INFO_SIZE, 56*91f16700Schasinglulu SDS_ACCESS_MODE_NON_CACHED); 57*91f16700Schasinglulu if (ret != SDS_OK) { 58*91f16700Schasinglulu ERROR("Error getting platform info from SDS. ret:%d\n", ret); 59*91f16700Schasinglulu panic(); 60*91f16700Schasinglulu } 61*91f16700Schasinglulu #endif 62*91f16700Schasinglulu arm_bl31_platform_setup(); 63*91f16700Schasinglulu } 64*91f16700Schasinglulu 65*91f16700Schasinglulu #ifdef TARGET_PLATFORM_SOC 66*91f16700Schasinglulu /***************************************************************************** 67*91f16700Schasinglulu * plat_is_smccc_feature_available() - This function checks whether SMCCC 68*91f16700Schasinglulu * feature is availabile for platform. 69*91f16700Schasinglulu * @fid: SMCCC function id 70*91f16700Schasinglulu * 71*91f16700Schasinglulu * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and 72*91f16700Schasinglulu * SMC_ARCH_CALL_NOT_SUPPORTED otherwise. 73*91f16700Schasinglulu *****************************************************************************/ 74*91f16700Schasinglulu int32_t plat_is_smccc_feature_available(u_register_t fid) 75*91f16700Schasinglulu { 76*91f16700Schasinglulu switch (fid) { 77*91f16700Schasinglulu case SMCCC_ARCH_SOC_ID: 78*91f16700Schasinglulu return SMC_ARCH_CALL_SUCCESS; 79*91f16700Schasinglulu default: 80*91f16700Schasinglulu return SMC_ARCH_CALL_NOT_SUPPORTED; 81*91f16700Schasinglulu } 82*91f16700Schasinglulu } 83*91f16700Schasinglulu 84*91f16700Schasinglulu /* Get SOC version */ 85*91f16700Schasinglulu int32_t plat_get_soc_version(void) 86*91f16700Schasinglulu { 87*91f16700Schasinglulu int ssc_version; 88*91f16700Schasinglulu 89*91f16700Schasinglulu ssc_version = mmio_read_32(SSC_VERSION); 90*91f16700Schasinglulu 91*91f16700Schasinglulu return (int32_t) 92*91f16700Schasinglulu (SOC_ID_SET_JEP_106(ARM_SOC_CONTINUATION_CODE, 93*91f16700Schasinglulu ARM_SOC_IDENTIFICATION_CODE) | 94*91f16700Schasinglulu (GET_SSC_VERSION_PART_NUM(ssc_version) & SOC_ID_IMPL_DEF_MASK)); 95*91f16700Schasinglulu } 96*91f16700Schasinglulu 97*91f16700Schasinglulu /* Get SOC revision */ 98*91f16700Schasinglulu int32_t plat_get_soc_revision(void) 99*91f16700Schasinglulu { 100*91f16700Schasinglulu return (int32_t)plat_info.silicon_revision; 101*91f16700Schasinglulu } 102*91f16700Schasinglulu #endif 103