1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2017,2021, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/bl_common.h> 10*91f16700Schasinglulu #include <common/desc_image_load.h> 11*91f16700Schasinglulu #include <lib/fconf/fconf.h> 12*91f16700Schasinglulu #include <lib/fconf/fconf_dyn_cfg_getter.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu #if JUNO_AARCH32_EL3_RUNTIME 17*91f16700Schasinglulu /******************************************************************************* 18*91f16700Schasinglulu * This function changes the spsr for BL32 image to bypass 19*91f16700Schasinglulu * the check in BL1 AArch64 exception handler. This is needed in the aarch32 20*91f16700Schasinglulu * boot flow as the core comes up in aarch64 and to enter the BL32 image a warm 21*91f16700Schasinglulu * reset in aarch32 state is required. 22*91f16700Schasinglulu ******************************************************************************/ 23*91f16700Schasinglulu int arm_bl2_plat_handle_post_image_load(unsigned int image_id) 24*91f16700Schasinglulu { 25*91f16700Schasinglulu int err = arm_bl2_handle_post_image_load(image_id); 26*91f16700Schasinglulu 27*91f16700Schasinglulu if (!err && (image_id == BL32_IMAGE_ID)) { 28*91f16700Schasinglulu bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 29*91f16700Schasinglulu assert(bl_mem_params); 30*91f16700Schasinglulu bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, 31*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS); 32*91f16700Schasinglulu } 33*91f16700Schasinglulu 34*91f16700Schasinglulu return err; 35*91f16700Schasinglulu } 36*91f16700Schasinglulu 37*91f16700Schasinglulu #else 38*91f16700Schasinglulu 39*91f16700Schasinglulu /******************************************************************************* 40*91f16700Schasinglulu * This function returns the list of executable images 41*91f16700Schasinglulu ******************************************************************************/ 42*91f16700Schasinglulu struct bl_params *plat_get_next_bl_params(void) 43*91f16700Schasinglulu { 44*91f16700Schasinglulu struct bl_params *arm_bl_params = arm_get_next_bl_params(); 45*91f16700Schasinglulu 46*91f16700Schasinglulu #if __aarch64__ 47*91f16700Schasinglulu const struct dyn_cfg_dtb_info_t *fw_config_info; 48*91f16700Schasinglulu bl_mem_params_node_t *param_node; 49*91f16700Schasinglulu uintptr_t fw_config_base = 0U; 50*91f16700Schasinglulu entry_point_info_t *ep_info; 51*91f16700Schasinglulu 52*91f16700Schasinglulu /* Get BL31 image node */ 53*91f16700Schasinglulu param_node = get_bl_mem_params_node(BL31_IMAGE_ID); 54*91f16700Schasinglulu assert(param_node != NULL); 55*91f16700Schasinglulu 56*91f16700Schasinglulu /* Get fw_config load address */ 57*91f16700Schasinglulu fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID); 58*91f16700Schasinglulu assert(fw_config_info != NULL); 59*91f16700Schasinglulu 60*91f16700Schasinglulu fw_config_base = fw_config_info->config_addr; 61*91f16700Schasinglulu assert(fw_config_base != 0U); 62*91f16700Schasinglulu 63*91f16700Schasinglulu /* 64*91f16700Schasinglulu * Get the entry point info of BL31 image and override 65*91f16700Schasinglulu * arg1 of entry point info with fw_config base address 66*91f16700Schasinglulu */ 67*91f16700Schasinglulu ep_info = ¶m_node->ep_info; 68*91f16700Schasinglulu ep_info->args.arg1 = (uint32_t)fw_config_base; 69*91f16700Schasinglulu #endif /* __aarch64__ */ 70*91f16700Schasinglulu 71*91f16700Schasinglulu return arm_bl_params; 72*91f16700Schasinglulu } 73*91f16700Schasinglulu #endif /* JUNO_AARCH32_EL3_RUNTIME */ 74