1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <asm_macros.S> 8*91f16700Schasinglulu 9*91f16700Schasinglulu .globl disable_mpu_el2 10*91f16700Schasinglulu .globl disable_mpu_icache_el2 11*91f16700Schasinglulu 12*91f16700Schasinglulu/* --------------------------------------------------------------------------- 13*91f16700Schasinglulu * Disable the MPU at EL2. 14*91f16700Schasinglulu * --------------------------------------------------------------------------- 15*91f16700Schasinglulu */ 16*91f16700Schasinglulu 17*91f16700Schasinglulufunc disable_mpu_el2 18*91f16700Schasinglulu mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT) 19*91f16700Schasingluludo_disable_mpu_el2: 20*91f16700Schasinglulu mrs x0, sctlr_el2 21*91f16700Schasinglulu bic x0, x0, x1 22*91f16700Schasinglulu msr sctlr_el2, x0 23*91f16700Schasinglulu isb /* ensure MMU is off */ 24*91f16700Schasinglulu dsb sy 25*91f16700Schasinglulu ret 26*91f16700Schasingluluendfunc disable_mpu_el2 27*91f16700Schasinglulu 28*91f16700Schasinglulu 29*91f16700Schasinglulufunc disable_mpu_icache_el2 30*91f16700Schasinglulu mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT) 31*91f16700Schasinglulu b do_disable_mpu_el2 32*91f16700Schasingluluendfunc disable_mpu_icache_el2 33