1 /* 2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include "../../../../bl1/bl1_private.h" 10 #include <arch.h> 11 #include <arch_features.h> 12 #include <arch_helpers.h> 13 #include <bl1/bl1.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <drivers/auth/auth_mod.h> 17 #include <drivers/console.h> 18 #include <lib/cpus/errata.h> 19 #include <lib/utils.h> 20 #include <smccc_helpers.h> 21 #include <tools_share/uuid.h> 22 #include <plat/arm/common/plat_arm.h> 23 #include <plat/common/platform.h> 24 25 #include <platform_def.h> 26 27 28 void cm_prepare_el2_exit(void); 29 30 void bl1_run_next_image(const struct entry_point_info *bl_ep_info); 31 32 /******************************************************************************* 33 * Function to perform late architectural and platform specific initialization. 34 * It also queries the platform to load and run next BL image. Only called 35 * by the primary cpu after a cold boot. 36 ******************************************************************************/ 37 void bl1_transfer_bl33(void) 38 { 39 unsigned int image_id; 40 41 /* Get the image id of next image to load and run. */ 42 image_id = bl1_plat_get_next_image_id(); 43 44 #if !ARM_DISABLE_TRUSTED_WDOG 45 /* Disable watchdog before leaving BL1 */ 46 plat_arm_secure_wdt_stop(); 47 #endif 48 49 bl1_run_next_image(&bl1_plat_get_image_desc(image_id)->ep_info); 50 } 51 52 /******************************************************************************* 53 * This function locates and loads the BL33 raw binary image in the trusted SRAM. 54 * Called by the primary cpu after a cold boot. 55 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 56 * loader etc. 57 ******************************************************************************/ 58 void bl1_load_bl33(void) 59 { 60 image_desc_t *desc; 61 image_info_t *info; 62 int err; 63 64 /* Get the image descriptor */ 65 desc = bl1_plat_get_image_desc(BL33_IMAGE_ID); 66 assert(desc != NULL); 67 68 /* Get the image info */ 69 info = &desc->image_info; 70 INFO("BL1: Loading BL33\n"); 71 72 err = bl1_plat_handle_pre_image_load(BL33_IMAGE_ID); 73 if (err != 0) { 74 ERROR("Failure in pre image load handling of BL33 (%d)\n", err); 75 plat_error_handler(err); 76 } 77 78 err = load_auth_image(BL33_IMAGE_ID, info); 79 if (err != 0) { 80 ERROR("Failed to load BL33 firmware.\n"); 81 plat_error_handler(err); 82 } 83 84 /* Allow platform to handle image information. */ 85 err = bl1_plat_handle_post_image_load(BL33_IMAGE_ID); 86 if (err != 0) { 87 ERROR("Failure in post image load handling of BL33 (%d)\n", err); 88 plat_error_handler(err); 89 } 90 91 NOTICE("BL1: Booting BL33\n"); 92 } 93 94 /******************************************************************************* 95 * Helper utility to calculate the BL2 memory layout taking into consideration 96 * the BL1 RW data assuming that it is at the top of the memory layout. 97 ******************************************************************************/ 98 void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 99 meminfo_t *bl2_mem_layout) 100 { 101 assert(bl1_mem_layout != NULL); 102 assert(bl2_mem_layout != NULL); 103 104 /* 105 * Remove BL1 RW data from the scope of memory visible to BL2. 106 * This is assuming BL1 RW data is at the top of bl1_mem_layout. 107 */ 108 assert(bl1_mem_layout->total_base < BL1_RW_BASE); 109 bl2_mem_layout->total_base = bl1_mem_layout->total_base; 110 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; 111 112 flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t)); 113 } 114 115 /******************************************************************************* 116 * This function prepares for entry to BL33 117 ******************************************************************************/ 118 void bl1_prepare_next_image(unsigned int image_id) 119 { 120 unsigned int mode = MODE_EL1; 121 image_desc_t *desc; 122 entry_point_info_t *next_bl_ep; 123 124 #if CTX_INCLUDE_AARCH32_REGS 125 /* 126 * Ensure that the build flag to save AArch32 system registers in CPU 127 * context is not set for AArch64-only platforms. 128 */ 129 if (el_implemented(1) == EL_IMPL_A64ONLY) { 130 ERROR("EL1 supports AArch64-only. Please set build flag %s", 131 "CTX_INCLUDE_AARCH32_REGS = 0\n"); 132 panic(); 133 } 134 #endif 135 136 /* Get the image descriptor. */ 137 desc = bl1_plat_get_image_desc(image_id); 138 assert(desc != NULL); 139 140 /* Get the entry point info. */ 141 next_bl_ep = &desc->ep_info; 142 143 /* FVP-R is only secure */ 144 assert(GET_SECURITY_STATE(next_bl_ep->h.attr) == SECURE); 145 146 /* Prepare the SPSR for the next BL image. */ 147 next_bl_ep->spsr = (uint32_t)SPSR_64((uint64_t) mode, 148 (uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 149 150 /* Allow platform to make change */ 151 bl1_plat_set_ep_info(image_id, next_bl_ep); 152 153 /* Prepare context for the next EL */ 154 cm_prepare_el2_exit(); 155 156 /* Indicate that image is in execution state. */ 157 desc->state = IMAGE_STATE_EXECUTED; 158 159 print_entry_point_info(next_bl_ep); 160 } 161 162 /******************************************************************************* 163 * Setup function for BL1. 164 ******************************************************************************/ 165 void bl1_setup(void) 166 { 167 /* Perform early platform-specific setup */ 168 bl1_early_platform_setup(); 169 170 /* Perform late platform-specific setup */ 171 bl1_plat_arch_setup(); 172 } 173 174 /******************************************************************************* 175 * Function to perform late architectural and platform specific initialization. 176 * It also queries the platform to load and run next BL image. Only called 177 * by the primary cpu after a cold boot. 178 ******************************************************************************/ 179 void bl1_main(void) 180 { 181 unsigned int image_id; 182 183 /* Announce our arrival */ 184 NOTICE(FIRMWARE_WELCOME_STR); 185 NOTICE("BL1: %s\n", version_string); 186 NOTICE("BL1: %s\n", build_message); 187 188 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT); 189 190 print_errata_status(); 191 192 #if ENABLE_ASSERTIONS 193 u_register_t val; 194 /* 195 * Ensure that MMU/Caches and coherency are turned on 196 */ 197 val = read_sctlr_el2(); 198 199 assert((val & SCTLR_M_BIT) != 0U); 200 assert((val & SCTLR_C_BIT) != 0U); 201 assert((val & SCTLR_I_BIT) != 0U); 202 /* 203 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 204 * provided platform value 205 */ 206 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 207 /* 208 * If CWG is zero, then no CWG information is available but we can 209 * at least check the platform value is less than the architectural 210 * maximum. 211 */ 212 if (val != 0) { 213 assert(SIZE_FROM_LOG2_WORDS(val) == CACHE_WRITEBACK_GRANULE); 214 } else { 215 assert(MAX_CACHE_LINE_SIZE >= CACHE_WRITEBACK_GRANULE); 216 } 217 #endif /* ENABLE_ASSERTIONS */ 218 219 /* Perform remaining generic architectural setup from ELmax */ 220 bl1_arch_setup(); 221 222 #if TRUSTED_BOARD_BOOT 223 /* Initialize authentication module */ 224 auth_mod_init(); 225 #endif /* TRUSTED_BOARD_BOOT */ 226 227 /* Perform platform setup in BL1. */ 228 bl1_platform_setup(); 229 230 /* Get the image id of next image to load and run. */ 231 image_id = bl1_plat_get_next_image_id(); 232 233 /* 234 * We currently interpret any image id other than 235 * BL2_IMAGE_ID as the start of firmware update. 236 */ 237 if (image_id == BL33_IMAGE_ID) { 238 bl1_load_bl33(); 239 } else { 240 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 241 } 242 243 bl1_prepare_next_image(image_id); 244 245 console_flush(); 246 247 bl1_transfer_bl33(); 248 } 249 250 /******************************************************************************* 251 * Function called just before handing over to the next BL to inform the user 252 * about the boot progress. In debug mode, also print details about the BL 253 * image's execution context. 254 ******************************************************************************/ 255 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 256 { 257 NOTICE("BL1: Booting BL31\n"); 258 print_entry_point_info(bl_ep_info); 259 } 260 261 #if SPIN_ON_BL1_EXIT 262 void print_debug_loop_message(void) 263 { 264 NOTICE("BL1: Debug loop, spinning forever\n"); 265 NOTICE("BL1: Please connect the debugger to continue\n"); 266 } 267 #endif 268 269