1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu#ifndef PLAT_MACROS_S 7*91f16700Schasinglulu#define PLAT_MACROS_S 8*91f16700Schasinglulu 9*91f16700Schasinglulu#include <arm_macros.S> 10*91f16700Schasinglulu#include <platform_def.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* --------------------------------------------- 13*91f16700Schasinglulu * The below required platform porting macro 14*91f16700Schasinglulu * prints out relevant GIC registers whenever an 15*91f16700Schasinglulu * unhandled exception is taken in BL31. 16*91f16700Schasinglulu * Clobbers: x0 - x10, x16, x17, sp 17*91f16700Schasinglulu * --------------------------------------------- 18*91f16700Schasinglulu */ 19*91f16700Schasinglulu .macro plat_crash_print_regs 20*91f16700Schasinglulu /* 21*91f16700Schasinglulu * Detect if we're using the base memory map or 22*91f16700Schasinglulu * the legacy VE memory map 23*91f16700Schasinglulu */ 24*91f16700Schasinglulu mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID) 25*91f16700Schasinglulu ldr w16, [x0] 26*91f16700Schasinglulu /* Extract BLD (12th - 15th bits) from the SYS_ID */ 27*91f16700Schasinglulu ubfx x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4 28*91f16700Schasinglulu /* Check if VE mmap */ 29*91f16700Schasinglulu cmp w16, #BLD_GIC_VE_MMAP 30*91f16700Schasinglulu b.eq use_ve_mmap 31*91f16700Schasinglulu /* Assume Base Cortex mmap */ 32*91f16700Schasinglulu mov_imm x17, BASE_GICC_BASE 33*91f16700Schasinglulu mov_imm x16, BASE_GICD_BASE 34*91f16700Schasinglulu b print_gic_regs 35*91f16700Schasingluluuse_ve_mmap: 36*91f16700Schasinglulu mov_imm x17, VE_GICC_BASE 37*91f16700Schasinglulu mov_imm x16, VE_GICD_BASE 38*91f16700Schasingluluprint_gic_regs: 39*91f16700Schasinglulu arm_print_gic_regs 40*91f16700Schasinglulu .endm 41*91f16700Schasinglulu 42*91f16700Schasinglulu#endif /* PLAT_MACROS_S */ 43