1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <plat/arm/common/arm_config.h> 8*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 9*91f16700Schasinglulu #include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu /* 12*91f16700Schasinglulu * We assume that all security programming is done by the primary core. 13*91f16700Schasinglulu */ 14*91f16700Schasinglulu void plat_arm_security_setup(void) 15*91f16700Schasinglulu { 16*91f16700Schasinglulu /* 17*91f16700Schasinglulu * The Base FVP has a TrustZone address space controller, the Foundation 18*91f16700Schasinglulu * FVP does not. Trying to program the device on the foundation FVP will 19*91f16700Schasinglulu * cause an abort. 20*91f16700Schasinglulu * 21*91f16700Schasinglulu * If the platform had additional peripheral specific security 22*91f16700Schasinglulu * configurations, those would be configured here. 23*91f16700Schasinglulu */ 24*91f16700Schasinglulu 25*91f16700Schasinglulu const arm_tzc_regions_info_t fvp_tzc_regions[] = { 26*91f16700Schasinglulu ARM_TZC_REGIONS_DEF, 27*91f16700Schasinglulu #if !SPM_MM && !ENABLE_RME 28*91f16700Schasinglulu {FVP_DRAM3_BASE, FVP_DRAM3_END, 29*91f16700Schasinglulu ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, 30*91f16700Schasinglulu {FVP_DRAM4_BASE, FVP_DRAM4_END, 31*91f16700Schasinglulu ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, 32*91f16700Schasinglulu {FVP_DRAM5_BASE, FVP_DRAM5_END, 33*91f16700Schasinglulu ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, 34*91f16700Schasinglulu {FVP_DRAM6_BASE, FVP_DRAM6_END, 35*91f16700Schasinglulu ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, 36*91f16700Schasinglulu #endif 37*91f16700Schasinglulu {0} 38*91f16700Schasinglulu }; 39*91f16700Schasinglulu 40*91f16700Schasinglulu if ((get_arm_config()->flags & ARM_CONFIG_HAS_TZC) != 0U) 41*91f16700Schasinglulu arm_tzc400_setup(PLAT_ARM_TZC_BASE, fvp_tzc_regions); 42*91f16700Schasinglulu } 43