1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019-2021, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <errno.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/debug.h> 10*91f16700Schasinglulu #include <drivers/arm/sp805.h> 11*91f16700Schasinglulu #include <drivers/cfi/v2m_flash.h> 12*91f16700Schasinglulu #include <lib/mmio.h> 13*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 14*91f16700Schasinglulu #include <platform_def.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu /* 17*91f16700Schasinglulu * FVP error handler 18*91f16700Schasinglulu */ 19*91f16700Schasinglulu __dead2 void plat_arm_error_handler(int err) 20*91f16700Schasinglulu { 21*91f16700Schasinglulu /* Propagate the err code in the NV-flags register */ 22*91f16700Schasinglulu mmio_write_32(V2M_SYS_NVFLAGS_ADDR, (uint32_t)err); 23*91f16700Schasinglulu 24*91f16700Schasinglulu console_flush(); 25*91f16700Schasinglulu 26*91f16700Schasinglulu /* Setup the watchdog to reset the system as soon as possible */ 27*91f16700Schasinglulu sp805_refresh(ARM_SP805_TWDG_BASE, 1U); 28*91f16700Schasinglulu 29*91f16700Schasinglulu for (;;) 30*91f16700Schasinglulu wfi(); 31*91f16700Schasinglulu } 32*91f16700Schasinglulu 33*91f16700Schasinglulu void __dead2 plat_arm_system_reset(void) 34*91f16700Schasinglulu { 35*91f16700Schasinglulu /* Write the System Configuration Control Register */ 36*91f16700Schasinglulu mmio_write_32(V2M_SYSREGS_BASE + V2M_SYS_CFGCTRL, 37*91f16700Schasinglulu V2M_CFGCTRL_START | 38*91f16700Schasinglulu V2M_CFGCTRL_RW | 39*91f16700Schasinglulu V2M_CFGCTRL_FUNC(V2M_FUNC_REBOOT)); 40*91f16700Schasinglulu wfi(); 41*91f16700Schasinglulu ERROR("FVP System Reset: operation not handled.\n"); 42*91f16700Schasinglulu panic(); 43*91f16700Schasinglulu } 44