1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu 8*91f16700Schasinglulu#/* 9*91f16700Schasinglulu# * TODO: below lines of code to be removed 10*91f16700Schasinglulu# * after abi and framework are synchronized 11*91f16700Schasinglulu# */ 12*91f16700Schasinglulu 13*91f16700Schasingluluifeq (${ERRATA_ABI_SUPPORT}, 1) 14*91f16700Schasinglulu# enable the cpu macros for errata abi interface 15*91f16700Schasingluluifeq (${ARCH}, aarch64) 16*91f16700Schasingluluifeq (${HW_ASSISTED_COHERENCY}, 0) 17*91f16700SchasingluluCORTEX_A35_H_INC := 1 18*91f16700SchasingluluCORTEX_A53_H_INC := 1 19*91f16700SchasingluluCORTEX_A57_H_INC := 1 20*91f16700SchasingluluCORTEX_A72_H_INC := 1 21*91f16700SchasingluluCORTEX_A73_H_INC := 1 22*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A35_H_INC)) 23*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A53_H_INC)) 24*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A57_H_INC)) 25*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A72_H_INC)) 26*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A73_H_INC)) 27*91f16700Schasingluluelse 28*91f16700Schasingluluifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 29*91f16700SchasingluluCORTEX_A76_H_INC := 1 30*91f16700SchasingluluCORTEX_A77_H_INC := 1 31*91f16700SchasingluluCORTEX_A78_H_INC := 1 32*91f16700SchasingluluNEOVERSE_N1_H_INC := 1 33*91f16700SchasingluluNEOVERSE_N2_H_INC := 1 34*91f16700SchasingluluNEOVERSE_V1_H_INC := 1 35*91f16700SchasingluluCORTEX_A78_AE_H_INC := 1 36*91f16700SchasingluluCORTEX_A510_H_INC := 1 37*91f16700SchasingluluCORTEX_A710_H_INC := 1 38*91f16700SchasingluluCORTEX_A715_H_INC := 1 39*91f16700SchasingluluCORTEX_A78C_H_INC := 1 40*91f16700SchasingluluCORTEX_X2_H_INC := 1 41*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A76_H_INC)) 42*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A77_H_INC)) 43*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A78_H_INC)) 44*91f16700Schasinglulu$(eval $(call add_define, NEOVERSE_N1_H_INC)) 45*91f16700Schasinglulu$(eval $(call add_define, NEOVERSE_N2_H_INC)) 46*91f16700Schasinglulu$(eval $(call add_define, NEOVERSE_V1_H_INC)) 47*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A78_AE_H_INC)) 48*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A510_H_INC)) 49*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A710_H_INC)) 50*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A715_H_INC)) 51*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A78C_H_INC)) 52*91f16700Schasinglulu$(eval $(call add_define, CORTEX_X2_H_INC)) 53*91f16700Schasingluluendif 54*91f16700SchasingluluCORTEX_A55_H_INC := 1 55*91f16700SchasingluluCORTEX_A75_H_INC := 1 56*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A55_H_INC)) 57*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A75_H_INC)) 58*91f16700Schasingluluendif 59*91f16700Schasingluluelse 60*91f16700SchasingluluCORTEX_A32_H_INC := 1 61*91f16700Schasinglulu$(eval $(call add_define, CORTEX_A32_H_INC)) 62*91f16700Schasingluluendif 63*91f16700Schasingluluendif 64