1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef FPGA_PRIVATE_H 8*91f16700Schasinglulu #define FPGA_PRIVATE_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include "../fpga_def.h" 11*91f16700Schasinglulu #include <platform_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define C_RUNTIME_READY_KEY (0xaa55aa55) 14*91f16700Schasinglulu #define VALID_MPID (1U) 15*91f16700Schasinglulu #define FPGA_MAX_DTB_SIZE 0x10000 16*91f16700Schasinglulu 17*91f16700Schasinglulu #ifndef __ASSEMBLER__ 18*91f16700Schasinglulu 19*91f16700Schasinglulu extern unsigned char fpga_valid_mpids[PLATFORM_CORE_COUNT]; 20*91f16700Schasinglulu 21*91f16700Schasinglulu void fpga_console_init(void); 22*91f16700Schasinglulu 23*91f16700Schasinglulu void plat_fpga_gic_init(void); 24*91f16700Schasinglulu void fpga_pwr_gic_on_finish(void); 25*91f16700Schasinglulu void fpga_pwr_gic_off(void); 26*91f16700Schasinglulu unsigned int plat_fpga_calc_core_pos(uint32_t mpid); 27*91f16700Schasinglulu unsigned int fpga_get_nr_gic_cores(void); 28*91f16700Schasinglulu uintptr_t fpga_get_redist_size(void); 29*91f16700Schasinglulu uintptr_t fpga_get_redist_base(void); 30*91f16700Schasinglulu bool fpga_has_its(void); 31*91f16700Schasinglulu 32*91f16700Schasinglulu #endif /* __ASSEMBLER__ */ 33*91f16700Schasinglulu 34*91f16700Schasinglulu #endif /* FPGA_PRIVATE_H */ 35