1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2023, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu * Linker script for the Arm Ltd. FPGA boards to generate an ELF file that 7*91f16700Schasinglulu * contains the ROM trampoline, BL31 and the DTB. 8*91f16700Schasinglulu * 9*91f16700Schasinglulu * This allows to pass just one file to the uploader tool, and automatically 10*91f16700Schasinglulu * provides the correct load addresses. 11*91f16700Schasinglulu */ 12*91f16700Schasinglulu 13*91f16700Schasinglulu#include <platform_def.h> 14*91f16700Schasinglulu 15*91f16700SchasingluluOUTPUT_FORMAT("elf64-littleaarch64") 16*91f16700SchasingluluOUTPUT_ARCH(aarch64) 17*91f16700Schasinglulu 18*91f16700SchasingluluINPUT(./rom_trampoline.o) 19*91f16700SchasingluluINPUT(./kernel_trampoline.o) 20*91f16700Schasinglulu 21*91f16700SchasingluluTARGET(binary) 22*91f16700SchasingluluINPUT(./bl31.bin) 23*91f16700SchasingluluINPUT(./fdts/arm_fpga.dtb) 24*91f16700Schasinglulu 25*91f16700SchasingluluENTRY(_start) 26*91f16700Schasinglulu 27*91f16700SchasingluluSECTIONS 28*91f16700Schasinglulu{ 29*91f16700Schasinglulu .rom (0x0): { 30*91f16700Schasinglulu *rom_trampoline.o(.text*) 31*91f16700Schasinglulu KEEP(*(.rom)) 32*91f16700Schasinglulu } 33*91f16700Schasinglulu 34*91f16700Schasinglulu .bl31 (BL31_BASE): { 35*91f16700Schasinglulu ASSERT(. == ALIGN(PAGE_SIZE), "BL31_BASE is not page aligned"); 36*91f16700Schasinglulu *bl31.bin 37*91f16700Schasinglulu } 38*91f16700Schasinglulu 39*91f16700Schasinglulu .dtb (FPGA_PRELOADED_DTB_BASE): { 40*91f16700Schasinglulu ASSERT(. == ALIGN(8), "DTB address is not 8-byte aligned"); 41*91f16700Schasinglulu *arm_fpga.dtb 42*91f16700Schasinglulu } 43*91f16700Schasinglulu 44*91f16700Schasinglulu .kern_tramp (PRELOADED_BL33_BASE): { 45*91f16700Schasinglulu *kernel_trampoline.o(.text*) 46*91f16700Schasinglulu KEEP(*(.kern_tramp)) 47*91f16700Schasinglulu } 48*91f16700Schasinglulu 49*91f16700Schasinglulu /DISCARD/ : { *(.stacks) } 50*91f16700Schasinglulu /DISCARD/ : { *(.debug_*) } 51*91f16700Schasinglulu /DISCARD/ : { *(.note*) } 52*91f16700Schasinglulu /DISCARD/ : { *(.comment*) } 53*91f16700Schasinglulu} 54