1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu /* The A5DS power domain tree descriptor */ 10*91f16700Schasinglulu static const unsigned char a5ds_power_domain_tree_desc[] = { 11*91f16700Schasinglulu 1, 12*91f16700Schasinglulu /* No of children for the root node */ 13*91f16700Schasinglulu A5DS_CLUSTER_COUNT, 14*91f16700Schasinglulu /* No of children for the first cluster node */ 15*91f16700Schasinglulu A5DS_CORE_COUNT, 16*91f16700Schasinglulu }; 17*91f16700Schasinglulu 18*91f16700Schasinglulu /******************************************************************************* 19*91f16700Schasinglulu * This function returns the topology according to A5DS_CLUSTER_COUNT. 20*91f16700Schasinglulu ******************************************************************************/ 21*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 22*91f16700Schasinglulu { 23*91f16700Schasinglulu return a5ds_power_domain_tree_desc; 24*91f16700Schasinglulu } 25*91f16700Schasinglulu 26*91f16700Schasinglulu /******************************************************************************* 27*91f16700Schasinglulu * Get core position using mpidr 28*91f16700Schasinglulu ******************************************************************************/ 29*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 30*91f16700Schasinglulu { 31*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 32*91f16700Schasinglulu 33*91f16700Schasinglulu mpidr &= MPIDR_AFFINITY_MASK; 34*91f16700Schasinglulu 35*91f16700Schasinglulu if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) 36*91f16700Schasinglulu return -1; 37*91f16700Schasinglulu 38*91f16700Schasinglulu cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 39*91f16700Schasinglulu cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 40*91f16700Schasinglulu 41*91f16700Schasinglulu if (cluster_id >= A5DS_CLUSTER_COUNT) 42*91f16700Schasinglulu return -1; 43*91f16700Schasinglulu 44*91f16700Schasinglulu /* 45*91f16700Schasinglulu * Validate cpu_id by checking whether it represents a CPU in 46*91f16700Schasinglulu * one of the two clusters present on the platform. 47*91f16700Schasinglulu */ 48*91f16700Schasinglulu if (cpu_id >= A5DS_MAX_CPUS_PER_CLUSTER) 49*91f16700Schasinglulu return -1; 50*91f16700Schasinglulu 51*91f16700Schasinglulu return (cpu_id + (cluster_id * 4)); 52*91f16700Schasinglulu 53*91f16700Schasinglulu } 54