xref: /arm-trusted-firmware/plat/amlogic/common/aml_mhu.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <lib/bakery_lock.h>
8*91f16700Schasinglulu #include <lib/mmio.h>
9*91f16700Schasinglulu #include <platform_def.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu static DEFINE_BAKERY_LOCK(mhu_lock);
12*91f16700Schasinglulu 
13*91f16700Schasinglulu void aml_mhu_secure_message_start(void)
14*91f16700Schasinglulu {
15*91f16700Schasinglulu 	bakery_lock_get(&mhu_lock);
16*91f16700Schasinglulu 
17*91f16700Schasinglulu 	while (mmio_read_32(AML_HIU_MAILBOX_STAT_3) != 0)
18*91f16700Schasinglulu 		;
19*91f16700Schasinglulu }
20*91f16700Schasinglulu 
21*91f16700Schasinglulu void aml_mhu_secure_message_send(uint32_t msg)
22*91f16700Schasinglulu {
23*91f16700Schasinglulu 	mmio_write_32(AML_HIU_MAILBOX_SET_3, msg);
24*91f16700Schasinglulu 
25*91f16700Schasinglulu 	while (mmio_read_32(AML_HIU_MAILBOX_STAT_3) != 0)
26*91f16700Schasinglulu 		;
27*91f16700Schasinglulu }
28*91f16700Schasinglulu 
29*91f16700Schasinglulu uint32_t aml_mhu_secure_message_wait(void)
30*91f16700Schasinglulu {
31*91f16700Schasinglulu 	uint32_t val;
32*91f16700Schasinglulu 
33*91f16700Schasinglulu 	do {
34*91f16700Schasinglulu 		val = mmio_read_32(AML_HIU_MAILBOX_STAT_0);
35*91f16700Schasinglulu 	} while (val == 0);
36*91f16700Schasinglulu 
37*91f16700Schasinglulu 	return val;
38*91f16700Schasinglulu }
39*91f16700Schasinglulu 
40*91f16700Schasinglulu void aml_mhu_secure_message_end(void)
41*91f16700Schasinglulu {
42*91f16700Schasinglulu 	mmio_write_32(AML_HIU_MAILBOX_CLR_0, 0xFFFFFFFF);
43*91f16700Schasinglulu 
44*91f16700Schasinglulu 	bakery_lock_release(&mhu_lock);
45*91f16700Schasinglulu }
46*91f16700Schasinglulu 
47*91f16700Schasinglulu void aml_mhu_secure_init(void)
48*91f16700Schasinglulu {
49*91f16700Schasinglulu 	bakery_lock_init(&mhu_lock);
50*91f16700Schasinglulu 
51*91f16700Schasinglulu 	mmio_write_32(AML_HIU_MAILBOX_CLR_3, 0xFFFFFFFF);
52*91f16700Schasinglulu }
53