1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <common/debug.h> 8*91f16700Schasinglulu #include <lib/mmio.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <sunxi_ccu.h> 11*91f16700Schasinglulu #include <sunxi_mmap.h> 12*91f16700Schasinglulu #include <sunxi_private.h> 13*91f16700Schasinglulu #include <sunxi_spc.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu #define DMA_SEC_REG 0x20 16*91f16700Schasinglulu 17*91f16700Schasinglulu /* 18*91f16700Schasinglulu * Setup the peripherals to be accessible by non-secure world. 19*91f16700Schasinglulu * This will not work for the Secure Peripherals Controller (SPC) unless 20*91f16700Schasinglulu * a fuse it burnt (seems to be an erratum), but we do it nevertheless, 21*91f16700Schasinglulu * to allow booting on boards using secure boot. 22*91f16700Schasinglulu */ 23*91f16700Schasinglulu void sunxi_security_setup(void) 24*91f16700Schasinglulu { 25*91f16700Schasinglulu int i; 26*91f16700Schasinglulu 27*91f16700Schasinglulu INFO("Configuring SPC Controller\n"); 28*91f16700Schasinglulu /* SPC setup: set all devices to non-secure */ 29*91f16700Schasinglulu for (i = 0; i < SUNXI_SPC_NUM_PORTS; i++) 30*91f16700Schasinglulu mmio_write_32(SUNXI_SPC_DECPORT_SET_REG(i), 0xffffffff); 31*91f16700Schasinglulu 32*91f16700Schasinglulu /* set MBUS clocks, bus clocks (AXI/AHB/APB) and PLLs to non-secure */ 33*91f16700Schasinglulu mmio_write_32(SUNXI_CCU_SEC_SWITCH_REG, 0x7); 34*91f16700Schasinglulu 35*91f16700Schasinglulu /* Set R_PRCM bus clocks to non-secure */ 36*91f16700Schasinglulu mmio_write_32(SUNXI_R_PRCM_SEC_SWITCH_REG, 0x1); 37*91f16700Schasinglulu 38*91f16700Schasinglulu /* Set all DMA channels (16 max.) to non-secure */ 39*91f16700Schasinglulu mmio_write_32(SUNXI_DMA_BASE + DMA_SEC_REG, 0xffff); 40*91f16700Schasinglulu } 41