xref: /arm-trusted-firmware/plat/allwinner/common/include/sunxi_private.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef SUNXI_PRIVATE_H
8*91f16700Schasinglulu #define SUNXI_PRIVATE_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <common/fdt_fixup.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include <lib/psci/psci.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu extern const struct psci_cpu_idle_state sunxi_idle_states[];
15*91f16700Schasinglulu 
16*91f16700Schasinglulu void sunxi_configure_mmu_el3(int flags);
17*91f16700Schasinglulu 
18*91f16700Schasinglulu void sunxi_cpu_on(u_register_t mpidr);
19*91f16700Schasinglulu void sunxi_cpu_power_off_others(void);
20*91f16700Schasinglulu void sunxi_cpu_power_off_self(void);
21*91f16700Schasinglulu void sunxi_power_down(void);
22*91f16700Schasinglulu 
23*91f16700Schasinglulu #if SUNXI_PSCI_USE_NATIVE
24*91f16700Schasinglulu void sunxi_set_native_psci_ops(const plat_psci_ops_t **psci_ops);
25*91f16700Schasinglulu #else
26*91f16700Schasinglulu static inline void sunxi_set_native_psci_ops(const plat_psci_ops_t **psci_ops)
27*91f16700Schasinglulu {
28*91f16700Schasinglulu }
29*91f16700Schasinglulu #endif
30*91f16700Schasinglulu #if SUNXI_PSCI_USE_SCPI
31*91f16700Schasinglulu bool sunxi_psci_is_scpi(void);
32*91f16700Schasinglulu int sunxi_set_scpi_psci_ops(const plat_psci_ops_t **psci_ops);
33*91f16700Schasinglulu #else
34*91f16700Schasinglulu static inline bool sunxi_psci_is_scpi(void)
35*91f16700Schasinglulu {
36*91f16700Schasinglulu 	return false;
37*91f16700Schasinglulu }
38*91f16700Schasinglulu static inline int sunxi_set_scpi_psci_ops(const plat_psci_ops_t **psci_ops)
39*91f16700Schasinglulu {
40*91f16700Schasinglulu 	return -1;
41*91f16700Schasinglulu }
42*91f16700Schasinglulu #endif
43*91f16700Schasinglulu int sunxi_validate_ns_entrypoint(uintptr_t ns_entrypoint);
44*91f16700Schasinglulu 
45*91f16700Schasinglulu int sunxi_pmic_setup(uint16_t socid, const void *fdt);
46*91f16700Schasinglulu void sunxi_security_setup(void);
47*91f16700Schasinglulu 
48*91f16700Schasinglulu uint16_t sunxi_read_soc_id(void);
49*91f16700Schasinglulu void sunxi_set_gpio_out(char port, int pin, bool level_high);
50*91f16700Schasinglulu int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb);
51*91f16700Schasinglulu void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param);
52*91f16700Schasinglulu 
53*91f16700Schasinglulu #if SUNXI_AMEND_DTB
54*91f16700Schasinglulu void sunxi_prepare_dtb(void *fdt);
55*91f16700Schasinglulu #else
56*91f16700Schasinglulu static inline void sunxi_prepare_dtb(void *fdt)
57*91f16700Schasinglulu {
58*91f16700Schasinglulu }
59*91f16700Schasinglulu #endif
60*91f16700Schasinglulu 
61*91f16700Schasinglulu #endif /* SUNXI_PRIVATE_H */
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