1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2021, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef XLAT_TABLES_PRIVATE_H 8*91f16700Schasinglulu #define XLAT_TABLES_PRIVATE_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdbool.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include <platform_def.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_defs.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu #if PLAT_XLAT_TABLES_DYNAMIC 17*91f16700Schasinglulu /* 18*91f16700Schasinglulu * Private shifts and masks to access fields of an mmap attribute 19*91f16700Schasinglulu */ 20*91f16700Schasinglulu /* Dynamic or static */ 21*91f16700Schasinglulu #define MT_DYN_SHIFT U(31) 22*91f16700Schasinglulu 23*91f16700Schasinglulu /* 24*91f16700Schasinglulu * Memory mapping private attributes 25*91f16700Schasinglulu * 26*91f16700Schasinglulu * Private attributes not exposed in the public header. 27*91f16700Schasinglulu */ 28*91f16700Schasinglulu 29*91f16700Schasinglulu /* 30*91f16700Schasinglulu * Regions mapped before the MMU can't be unmapped dynamically (they are 31*91f16700Schasinglulu * static) and regions mapped with MMU enabled can be unmapped. This 32*91f16700Schasinglulu * behaviour can't be overridden. 33*91f16700Schasinglulu * 34*91f16700Schasinglulu * Static regions can overlap each other, dynamic regions can't. 35*91f16700Schasinglulu */ 36*91f16700Schasinglulu #define MT_STATIC (U(0) << MT_DYN_SHIFT) 37*91f16700Schasinglulu #define MT_DYNAMIC (U(1) << MT_DYN_SHIFT) 38*91f16700Schasinglulu 39*91f16700Schasinglulu #endif /* PLAT_XLAT_TABLES_DYNAMIC */ 40*91f16700Schasinglulu 41*91f16700Schasinglulu extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX]; 42*91f16700Schasinglulu 43*91f16700Schasinglulu /* Determine the physical address space encoded in the 'attr' parameter. */ 44*91f16700Schasinglulu uint32_t xlat_arch_get_pas(uint32_t attr); 45*91f16700Schasinglulu 46*91f16700Schasinglulu /* 47*91f16700Schasinglulu * Return the execute-never mask that will prevent instruction fetch at the 48*91f16700Schasinglulu * given translation regime. 49*91f16700Schasinglulu */ 50*91f16700Schasinglulu uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime); 51*91f16700Schasinglulu 52*91f16700Schasinglulu /* 53*91f16700Schasinglulu * Invalidate all TLB entries that match the given virtual address. This 54*91f16700Schasinglulu * operation applies to all PEs in the same Inner Shareable domain as the PE 55*91f16700Schasinglulu * that executes this function. This functions must be called for every 56*91f16700Schasinglulu * translation table entry that is modified. It only affects the specified 57*91f16700Schasinglulu * translation regime. 58*91f16700Schasinglulu * 59*91f16700Schasinglulu * Note, however, that it is architecturally UNDEFINED to invalidate TLB entries 60*91f16700Schasinglulu * pertaining to a higher exception level, e.g. invalidating EL3 entries from 61*91f16700Schasinglulu * S-EL1. 62*91f16700Schasinglulu */ 63*91f16700Schasinglulu void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime); 64*91f16700Schasinglulu 65*91f16700Schasinglulu /* 66*91f16700Schasinglulu * This function has to be called at the end of any code that uses the function 67*91f16700Schasinglulu * xlat_arch_tlbi_va(). 68*91f16700Schasinglulu */ 69*91f16700Schasinglulu void xlat_arch_tlbi_va_sync(void); 70*91f16700Schasinglulu 71*91f16700Schasinglulu /* Print VA, PA, size and attributes of all regions in the mmap array. */ 72*91f16700Schasinglulu void xlat_mmap_print(const mmap_region_t *mmap); 73*91f16700Schasinglulu 74*91f16700Schasinglulu /* 75*91f16700Schasinglulu * Print the current state of the translation tables by reading them from 76*91f16700Schasinglulu * memory. 77*91f16700Schasinglulu */ 78*91f16700Schasinglulu void xlat_tables_print(xlat_ctx_t *ctx); 79*91f16700Schasinglulu 80*91f16700Schasinglulu /* 81*91f16700Schasinglulu * Returns a block/page table descriptor for the given level and attributes. 82*91f16700Schasinglulu */ 83*91f16700Schasinglulu uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr, 84*91f16700Schasinglulu unsigned long long addr_pa, unsigned int level); 85*91f16700Schasinglulu 86*91f16700Schasinglulu /* 87*91f16700Schasinglulu * Architecture-specific initialization code. 88*91f16700Schasinglulu */ 89*91f16700Schasinglulu 90*91f16700Schasinglulu /* Returns the current Exception Level. The returned EL must be 1 or higher. */ 91*91f16700Schasinglulu unsigned int xlat_arch_current_el(void); 92*91f16700Schasinglulu 93*91f16700Schasinglulu /* 94*91f16700Schasinglulu * Return the maximum physical address supported by the hardware. 95*91f16700Schasinglulu * This value depends on the execution state (AArch32/AArch64). 96*91f16700Schasinglulu */ 97*91f16700Schasinglulu unsigned long long xlat_arch_get_max_supported_pa(void); 98*91f16700Schasinglulu 99*91f16700Schasinglulu /* 100*91f16700Schasinglulu * Returns true if the MMU of the translation regime managed by the given 101*91f16700Schasinglulu * xlat_ctx_t is enabled, false otherwise. 102*91f16700Schasinglulu */ 103*91f16700Schasinglulu bool is_mmu_enabled_ctx(const xlat_ctx_t *ctx); 104*91f16700Schasinglulu 105*91f16700Schasinglulu /* 106*91f16700Schasinglulu * Returns minimum virtual address space size supported by the architecture 107*91f16700Schasinglulu */ 108*91f16700Schasinglulu uintptr_t xlat_get_min_virt_addr_space_size(void); 109*91f16700Schasinglulu 110*91f16700Schasinglulu #endif /* XLAT_TABLES_PRIVATE_H */ 111