xref: /arm-trusted-firmware/lib/xlat_mpu/xlat_mpu_private.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef XLAT_MPU_PRIVATE_H
8*91f16700Schasinglulu #define XLAT_MPU_PRIVATE_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdbool.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_defs.h>
13*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h>
14*91f16700Schasinglulu 
15*91f16700Schasinglulu #include <platform_def.h>
16*91f16700Schasinglulu 
17*91f16700Schasinglulu #if PLAT_XLAT_TABLES_DYNAMIC
18*91f16700Schasinglulu /*
19*91f16700Schasinglulu  * Private shifts and masks to access fields of an mmap attribute
20*91f16700Schasinglulu  */
21*91f16700Schasinglulu /* Dynamic or static */
22*91f16700Schasinglulu #define MT_DYN_SHIFT		U(31)
23*91f16700Schasinglulu 
24*91f16700Schasinglulu /*
25*91f16700Schasinglulu  * Memory mapping private attributes
26*91f16700Schasinglulu  *
27*91f16700Schasinglulu  * Private attributes not exposed in the public header.
28*91f16700Schasinglulu  */
29*91f16700Schasinglulu 
30*91f16700Schasinglulu #endif /* PLAT_XLAT_TABLES_DYNAMIC */
31*91f16700Schasinglulu 
32*91f16700Schasinglulu /* Calculate region-attributes byte for PRBAR part of MPU-region descriptor: */
33*91f16700Schasinglulu uint64_t prbar_attr_value(uint32_t attr);
34*91f16700Schasinglulu /* Calculate region-attributes byte for PRLAR part of MPU-region descriptor: */
35*91f16700Schasinglulu uint64_t prlar_attr_value(uint32_t attr);
36*91f16700Schasinglulu /* Calculates the attr value for a given PRBAR and PRLAR entry value: */
37*91f16700Schasinglulu uint32_t region_attr(uint64_t prbar_attr, uint64_t prlar_attr);
38*91f16700Schasinglulu 
39*91f16700Schasinglulu #define PRBAR_PRLAR_ADDR_MASK	UL(0xffffffffffc0)
40*91f16700Schasinglulu 	/* mask for PRBAR & PRLAR MPU-region field */
41*91f16700Schasinglulu /* MPU region attribute bit fields: */
42*91f16700Schasinglulu #define PRBAR_SH_SHIFT		UL(4)
43*91f16700Schasinglulu #define PRBAR_SH_MASK		UL(0x3)
44*91f16700Schasinglulu #define PRBAR_AP_SHIFT		UL(2)
45*91f16700Schasinglulu #define PRBAR_AP_MASK		UL(0x3)
46*91f16700Schasinglulu #define PRBAR_XN_SHIFT		UL(1)
47*91f16700Schasinglulu #define PRBAR_XN_MASK		UL(0x3)
48*91f16700Schasinglulu #define PRLAR_NS_SHIFT		UL(4)
49*91f16700Schasinglulu #define PRLAR_NS_MASK		UL(0x3)
50*91f16700Schasinglulu #define PRBAR_ATTR_SHIFT	UL(0)
51*91f16700Schasinglulu #define PRBAR_ATTR_MASK		UL(0x3f)
52*91f16700Schasinglulu #define PRLAR_ATTR_SHIFT	UL(1)
53*91f16700Schasinglulu #define PRLAR_ATTR_MASK		UL(0x7)
54*91f16700Schasinglulu #define PRLAR_EN_SHIFT		UL(0)
55*91f16700Schasinglulu #define PRLAR_EN_MASK		UL(0x1)
56*91f16700Schasinglulu /* Aspects of the source attributes not defined elsewhere: */
57*91f16700Schasinglulu #define MT_PERM_MASK		UL(0x1)
58*91f16700Schasinglulu #define MT_SEC_MASK		UL(0x1)
59*91f16700Schasinglulu #define MT_EXECUTE_MASK		UL(0x3)
60*91f16700Schasinglulu #define MT_TYPE_SHIFT		UL(0)
61*91f16700Schasinglulu 
62*91f16700Schasinglulu extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
63*91f16700Schasinglulu 
64*91f16700Schasinglulu /*
65*91f16700Schasinglulu  * Return the execute-never mask that will prevent instruction fetch at the
66*91f16700Schasinglulu  * given translation regime.
67*91f16700Schasinglulu  */
68*91f16700Schasinglulu uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime);
69*91f16700Schasinglulu 
70*91f16700Schasinglulu /* Print VA, PA, size and attributes of all regions in the mmap array. */
71*91f16700Schasinglulu void xlat_mmap_print(const mmap_region_t *mmap);
72*91f16700Schasinglulu 
73*91f16700Schasinglulu /*
74*91f16700Schasinglulu  * Print the current state of the translation tables by reading them from
75*91f16700Schasinglulu  * memory.
76*91f16700Schasinglulu  */
77*91f16700Schasinglulu void xlat_tables_print(xlat_ctx_t *ctx);
78*91f16700Schasinglulu 
79*91f16700Schasinglulu /*
80*91f16700Schasinglulu  * Returns a block/page table descriptor for the given level and attributes.
81*91f16700Schasinglulu  */
82*91f16700Schasinglulu uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
83*91f16700Schasinglulu 		   unsigned long long addr_pa, unsigned int level);
84*91f16700Schasinglulu 
85*91f16700Schasinglulu /*
86*91f16700Schasinglulu  * Architecture-specific initialization code.
87*91f16700Schasinglulu  */
88*91f16700Schasinglulu 
89*91f16700Schasinglulu /* Returns the current Exception Level. The returned EL must be 1 or higher. */
90*91f16700Schasinglulu unsigned int xlat_arch_current_el(void);
91*91f16700Schasinglulu 
92*91f16700Schasinglulu /*
93*91f16700Schasinglulu  * Returns true if the MMU of the translation regime managed by the given
94*91f16700Schasinglulu  * xlat_ctx_t is enabled, false otherwise.
95*91f16700Schasinglulu  */
96*91f16700Schasinglulu bool is_mpu_enabled_ctx(const xlat_ctx_t *ctx);
97*91f16700Schasinglulu 
98*91f16700Schasinglulu /*
99*91f16700Schasinglulu  * Returns minimum virtual address space size supported by the architecture
100*91f16700Schasinglulu  */
101*91f16700Schasinglulu uintptr_t xlat_get_min_virt_addr_space_size(void);
102*91f16700Schasinglulu 
103*91f16700Schasinglulu #endif /* XLAT_MPU_PRIVATE_H */
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