xref: /arm-trusted-firmware/lib/extensions/spe/spe.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <stdbool.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <arch.h>
10*91f16700Schasinglulu #include <arch_features.h>
11*91f16700Schasinglulu #include <arch_helpers.h>
12*91f16700Schasinglulu #include <lib/el3_runtime/pubsub.h>
13*91f16700Schasinglulu #include <lib/extensions/spe.h>
14*91f16700Schasinglulu 
15*91f16700Schasinglulu static inline void psb_csync(void)
16*91f16700Schasinglulu {
17*91f16700Schasinglulu 	/*
18*91f16700Schasinglulu 	 * The assembler does not yet understand the psb csync mnemonic
19*91f16700Schasinglulu 	 * so use the equivalent hint instruction.
20*91f16700Schasinglulu 	 */
21*91f16700Schasinglulu 	__asm__ volatile("hint #17");
22*91f16700Schasinglulu }
23*91f16700Schasinglulu 
24*91f16700Schasinglulu void spe_init_el3(void)
25*91f16700Schasinglulu {
26*91f16700Schasinglulu 	uint64_t v;
27*91f16700Schasinglulu 
28*91f16700Schasinglulu 	/*
29*91f16700Schasinglulu 	 * MDCR_EL3.NSPB (ARM v8.2): SPE enabled in Non-secure state
30*91f16700Schasinglulu 	 * and disabled in secure state. Accesses to SPE registers at
31*91f16700Schasinglulu 	 * S-EL1 generate trap exceptions to EL3.
32*91f16700Schasinglulu 	 *
33*91f16700Schasinglulu 	 * MDCR_EL3.NSPBE: Profiling Buffer uses Non-secure Virtual Addresses.
34*91f16700Schasinglulu 	 * When FEAT_RME is not implemented, this field is RES0.
35*91f16700Schasinglulu 	 *
36*91f16700Schasinglulu 	 * MDCR_EL3.EnPMSN (ARM v8.7): Do not trap access to PMSNEVFR_EL1
37*91f16700Schasinglulu 	 * register at NS-EL1 or NS-EL2 to EL3 if FEAT_SPEv1p2 is implemented.
38*91f16700Schasinglulu 	 * Setting this bit to 1 doesn't have any effect on it when
39*91f16700Schasinglulu 	 * FEAT_SPEv1p2 not implemented.
40*91f16700Schasinglulu 	 */
41*91f16700Schasinglulu 	v = read_mdcr_el3();
42*91f16700Schasinglulu 	v |= MDCR_NSPB(MDCR_NSPB_EL1) | MDCR_EnPMSN_BIT;
43*91f16700Schasinglulu 	v &= ~(MDCR_NSPBE_BIT);
44*91f16700Schasinglulu 	write_mdcr_el3(v);
45*91f16700Schasinglulu }
46*91f16700Schasinglulu 
47*91f16700Schasinglulu void spe_init_el2_unused(void)
48*91f16700Schasinglulu {
49*91f16700Schasinglulu 	uint64_t v;
50*91f16700Schasinglulu 
51*91f16700Schasinglulu 	/*
52*91f16700Schasinglulu 	 * MDCR_EL2.TPMS (ARM v8.2): Do not trap statistical
53*91f16700Schasinglulu 	 * profiling controls to EL2.
54*91f16700Schasinglulu 	 *
55*91f16700Schasinglulu 	 * MDCR_EL2.E2PB (ARM v8.2): SPE enabled in Non-secure
56*91f16700Schasinglulu 	 * state. Accesses to profiling buffer controls at
57*91f16700Schasinglulu 	 * Non-secure EL1 are not trapped to EL2.
58*91f16700Schasinglulu 	 */
59*91f16700Schasinglulu 	v = read_mdcr_el2();
60*91f16700Schasinglulu 	v &= ~MDCR_EL2_TPMS;
61*91f16700Schasinglulu 	v |= MDCR_EL2_E2PB(MDCR_EL2_E2PB_EL1);
62*91f16700Schasinglulu 	write_mdcr_el2(v);
63*91f16700Schasinglulu }
64*91f16700Schasinglulu 
65*91f16700Schasinglulu void spe_disable(void)
66*91f16700Schasinglulu {
67*91f16700Schasinglulu 	uint64_t v;
68*91f16700Schasinglulu 
69*91f16700Schasinglulu 	/* Drain buffered data */
70*91f16700Schasinglulu 	psb_csync();
71*91f16700Schasinglulu 	dsbnsh();
72*91f16700Schasinglulu 
73*91f16700Schasinglulu 	/* Disable profiling buffer */
74*91f16700Schasinglulu 	v = read_pmblimitr_el1();
75*91f16700Schasinglulu 	v &= ~(1ULL << 0);
76*91f16700Schasinglulu 	write_pmblimitr_el1(v);
77*91f16700Schasinglulu 	isb();
78*91f16700Schasinglulu }
79*91f16700Schasinglulu 
80*91f16700Schasinglulu static void *spe_drain_buffers_hook(const void *arg)
81*91f16700Schasinglulu {
82*91f16700Schasinglulu 	if (!is_feat_spe_supported())
83*91f16700Schasinglulu 		return (void *)-1;
84*91f16700Schasinglulu 
85*91f16700Schasinglulu 	/* Drain buffered data */
86*91f16700Schasinglulu 	psb_csync();
87*91f16700Schasinglulu 	dsbnsh();
88*91f16700Schasinglulu 
89*91f16700Schasinglulu 	return (void *)0;
90*91f16700Schasinglulu }
91*91f16700Schasinglulu 
92*91f16700Schasinglulu SUBSCRIBE_TO_EVENT(cm_entering_secure_world, spe_drain_buffers_hook);
93