1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <asm_macros.S> 8*91f16700Schasinglulu#include <lib/el3_runtime/cpu_data.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu.globl init_cpu_data_ptr 11*91f16700Schasinglulu.globl _cpu_data_by_index 12*91f16700Schasinglulu 13*91f16700Schasinglulu/* ----------------------------------------------------------------- 14*91f16700Schasinglulu * void init_cpu_data_ptr(void) 15*91f16700Schasinglulu * 16*91f16700Schasinglulu * Initialise the TPIDR_EL3 register to refer to the cpu_data_t 17*91f16700Schasinglulu * for the calling CPU. This must be called before cm_get_cpu_data() 18*91f16700Schasinglulu * 19*91f16700Schasinglulu * This can be called without a valid stack. It assumes that 20*91f16700Schasinglulu * plat_my_core_pos() does not clobber register x10. 21*91f16700Schasinglulu * clobbers: x0, x1, x10 22*91f16700Schasinglulu * ----------------------------------------------------------------- 23*91f16700Schasinglulu */ 24*91f16700Schasinglulufunc init_cpu_data_ptr 25*91f16700Schasinglulu mov x10, x30 26*91f16700Schasinglulu bl plat_my_core_pos 27*91f16700Schasinglulu bl _cpu_data_by_index 28*91f16700Schasinglulu msr tpidr_el3, x0 29*91f16700Schasinglulu ret x10 30*91f16700Schasingluluendfunc init_cpu_data_ptr 31*91f16700Schasinglulu 32*91f16700Schasinglulu/* ----------------------------------------------------------------- 33*91f16700Schasinglulu * cpu_data_t *_cpu_data_by_index(uint32_t cpu_index) 34*91f16700Schasinglulu * 35*91f16700Schasinglulu * Return the cpu_data structure for the CPU with given linear index 36*91f16700Schasinglulu * 37*91f16700Schasinglulu * This can be called without a valid stack. 38*91f16700Schasinglulu * clobbers: x0, x1 39*91f16700Schasinglulu * ----------------------------------------------------------------- 40*91f16700Schasinglulu */ 41*91f16700Schasinglulufunc _cpu_data_by_index 42*91f16700Schasinglulu mov_imm x1, CPU_DATA_SIZE 43*91f16700Schasinglulu mul x0, x0, x1 44*91f16700Schasinglulu adrp x1, percpu_data 45*91f16700Schasinglulu add x1, x1, :lo12:percpu_data 46*91f16700Schasinglulu add x0, x0, x1 47*91f16700Schasinglulu ret 48*91f16700Schasingluluendfunc _cpu_data_by_index 49